Epitaxially integrating III-V lasers with Si-photonics is the key for compact, efficient, and scalable photonic integrated circuits (PICs). Here we present an investigation of a path forward in integrating III-V functionalities on industry-standard silicon-on-insulator (SOI) platforms using selective area hetero-epitaxy. Based on our recently developed methods of selectively growing device quality InP on (001)-oriented SOI wafers, we demonstrated InP stripes and segments, with dimensions varying from a few hundred nanometers to a few micrometers. The flexible epitaxy of InP on SOI together with the unique “bufferless” trait will enable efficient light interfacing with Si-based photonic devices using either evanescent or butt coupling schemes. We simulated the possibility of employing the micrometer-scale InP on insulator to realize electrically driven lasers and found that the metal induced optical loss is negligible when the InP dimension exceeds 4.0 μm. The potential of utilizing this selective area growth method to realize fully integrated Si-photonics is illustrated.

中文翻译：

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用于集成硅光子学的选择性生长III-V激光器

将III-V激光器与Si光子外延集成是紧凑，高效和可扩展的光子集成电路（PIC）的关键。在这里，我们介绍了使用选择性区域异质外延在工业标准绝缘体上硅（SOI）平台上集成III-V功能的前进方向的调查。基于我们最近开发的在（001）定向SOI晶圆上选择性生长器件质量InP的方法，我们展示了InP条纹和线段，尺寸从几百纳米到几微米不等。InP在SOI上的灵活外延以及独特的“无缓冲”特性将使人们能够使用e逝或对接耦合方案与基于Si的光子器件进行有效的光接口。我们模拟了在绝缘体上使用微米级InP来实现电驱动激光器的可能性，发现当InP尺寸超过4.0μm时，金属引起的光损耗可以忽略不计。说明了利用这种选择性区域生长方法实现完全集成的硅光子学的潜力。