This article presents a 2-channel 4-level pulse amplitude modulation (PAM4) transmitter front-end consisting of a 2-channel PAM4 shunt laser diode (LD) driver and flip-chip-bonded 1.3-μm LD array-on-Si that has the highest power efficiency yet reported for PAM4 transmitter front-ends. The driver was designed and fabricated using 65-nm CMOS technology, and the LD array-on-Si was fabricated using 1.3-μm membrane LD array-on-Si technology. To decrease the power consumption, the front-end does not use a high-speed digital-to-analog converter (DAC) or linear driver for generating the PAM4 signals. Instead, to generate clear PAM4 signals, the shunt LD driver incorporates DAC, and equalizing functions. The driver was designed with a photonic-electronic conversion system in SPICE, and the transmitter front-end was implemented with flip-chip-bonding interconnection between the driver and LD array-on-Si. The resulting 2-channel PAM4 transmitter front-end has high power efficiency. Our experiments show that in simultaneous operation, each channel could transmit 53-Gbps PAM4 signals, resulting in a power efficiency of 0.57 mW/Gbps. They also show that feed-forward equalization (FFE) with only 10 taps is enough for 2-km-long standard single-mode fiber (SSMF) transmission of 53-Gbps PAM4 signals with a bit error rate (BER) below 2.3 × 10 ⁻⁴ when the two channels are operated simultaneously.

中文翻译：

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低功耗PAM4发送器前端倒装芯片键合的1.3μm硅上LD阵列的2ch×53-Gbps光传输性能

本文介绍了一个2通道4级脉冲幅度调制（PAM4）发射器前端，该前端由2通道PAM4并联激光二极管（LD）驱动器和倒装芯片键合的1.3μm硅上LD阵列组成。具有PAM4发送器前端报告的最高功率效率。该驱动器是使用65 nm CMOS技术设计和制造的，而硅上LD阵列则是使用1.3μm膜LD硅上阵列技术制造的。为了降低功耗，前端不使用高速数模转换器（DAC）或线性驱动器来生成PAM4信号。相反，为了产生清晰的PAM4信号，并联LD驱动器集成了DAC和均衡功能。该驱动程序是在SPICE中采用光电子转换系统设计的，发射器前端通过驱动器和LD硅阵列之间的倒装芯片结合互连实现。最终的2通道PAM4发送器前端具有高功率效率。我们的实验表明，在同时运行时，每个通道都可以传输53 Gbps PAM4信号，因此功率效率为0.57 mW / Gbps。他们还表明，仅10个抽头的前馈均衡（FFE）就足以用于53 Gbps PAM4信号的2公里长的标准单模光纤（SSMF）传输，且误码率（BER）低于2.3×10 当两个通道同时操作时，⁻⁴。