Many computer systems for calculating the proper organization of memory are among the most critical issues. Using a tier cache memory (along with branching prediction) is an effective means of increasing modern multi-core processors' performance. Designing high-performance processors is a complex task and requires preliminary verification and analysis of the model level, usually used in analytical and simulation modeling. The refinement of extreme programming is an unfortunate challenge. Few experts disagree with the synthesis of access points. This article demonstrates that Internet QoS and 16-bit architectures are always incompatible, but it's the same situation for write-back caches. The solution to this problem can be implemented by analyzing simulation models of different complexity in combination with the analytical evaluation of individual algorithms. This work is devoted to designing a multi-parameter simulation model of a multi-process for evaluating the performance of cache memory algorithms and the optimality of the structure. Optimization of the structures and algorithms of the cache memory allows you to accelerate the interaction of the memory process and improve the performance of the entire system.

中文翻译：

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估计多处理器现金存储工作算法的效率

许多用于计算内存正确组织的计算机系统都是最关键的问题。使用分层缓存（以及分支预测）是提高现代多核处理器性能的有效方法。设计高性能处理器是一项复杂的任务，需要对模型级别进行初步验证和分析，通常用于分析和仿真建模中。极限编程的完善是一个不幸的挑战。很少有专家不同意接入点的综合。本文演示了Internet QoS和16位体系结构始终不兼容，但是写回缓存的情况相同。这个问题的解决方案可以通过分析不同复杂度的仿真模型并结合单个算法的分析评估来实现。这项工作致力于设计一个多进程的多参数仿真模型，以评估缓存算法的性能和结构的最佳性。通过优化高速缓存的结构和算法，可以加快存储过程的交互速度，并提高整个系统的性能。