Abstract

We investigate a formal verification problem (mathematically rigorous correctness checking) for digital waveforms used in practical development of digital microelectronic devices (digital circuits) at early design stages. According to modern methodologies, a digital circuit design starts at high abstraction levels provided by hardware description languages (HDLs). One of the essential steps of an HDL-based circuit design is an HDL code debug, similar to the same step of program development in means and importance. A popular method for an HDL code debug is based on extraction and analysis of a waveform that is a collection of plots for digital signals: functional descriptions of value changes related to the selected circuit places in real time. We propose mathematical means for automation of correctness checking for such waveforms based on concepts and methods of formal verification against temporal logic formulas and focus on such typical features of HDL-related digital signals and corresponding (informal) properties such as real time, three-valuedness, and presence of signal edges. The three-valuedness means that, at any given time, besides basic logical values 0 and 1, a signal may have a special undefined value: one of the values 0 and 1, but which one is either not known or not important. An edge point of a signal is a time point at which the signal changes its value. The main results are mathematical notions, propositions, and algorithms intended to formalize and solve the formal verification problem for considered waveforms including (i) the definitions for signals and waveforms that capture the mentioned typical digital signal features, (ii) the temporal logic suitable for formalization of waveform correctness properties and a related verification problem statement, (iii) a solution technique for the verification problem that is based on reduction to signal transformation and analysis, and (iv) a corresponding verification algorithm together with its correctness proof and “reasonable” complexity bounds.

中文翻译：

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三值数字波形的形式验证

摘要

我们调查早期设计阶段在数字微电子设备（数字电路）的实际开发中使用的数字波形的形式验证问题（数学上严格的正确性检查）。根据现代方法，数字电路设计从硬件描述语言（HDL）提供的高抽象级别开始。基于HDL的电路设计的基本步骤之一是HDL代码调试，其方法和重要性与程序开发的同一步骤相似。HDL代码调试的一种流行方法是基于波形的提取和分析，该波形是数字信号图的集合：与所选电路位置有关的值变化的功能描述是实时的。我们基于时间逻辑公式的形式验证的概念和方法，提出了自动校正此类波形的数学方法，并着重研究了HDL相关数字信号的典型特征以及相应的（非正式）属性，例如实时，三值性，以及信号边缘的存在。三值性意味着，在任何给定时间，除了基本逻辑值0和1之外，信号还可能具有特殊的不确定值：值0和1中的一个，但其中一个未知或不重要。信号的边缘点是信号改变其值的时间点。主要结果是数学概念，命题，