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Oscillator Flicker Phase Noise: A Tutorial
IEEE Transactions on Circuits and Systems II: Express Briefs ( IF 4.4 ) Pub Date : 2021-02-01 , DOI: 10.1109/tcsii.2020.3043165
Yizhe Hu , Teerachot Siriburanon , Robert Bogdan Staszewski

A deep understanding of how to reduce flicker phase noise (PN) in oscillators is critical in supporting ultra-low PN frequency generation for the advanced communications and other emerging high-speed applications. Unfortunately, the current literature is either full of conflicting theories and ambiguities or too complex in mathematics, hiding the physical insights. In this tutorial, we comprehensively review the evolution of flicker noise upconversion theories and clarify their controversial and confusing parts. Two classes of such upconversion mechanisms in voltage-biased LC-tank oscillators (nMOS-only and complementary) are specifically compared and numerically verified using a commercial simulation model of 28-nm CMOS. We identify that non-resistive terminations of both 2nd and 3rd harmonic currents contribute to oscillation waveform asymmetries that lead to the flicker noise upconversion. Further, we discuss three 1/f3 PN reduction mechanisms: waveform shaping, narrowing of conduction angle, and gate-drain phase shift.

中文翻译:

振荡器闪烁相位噪声:教程

深入了解如何降低振荡器中的闪烁相位噪声 (PN) 对于支持用于高级通信和其他新兴高速应用的超低 PN 频率生成至关重要。不幸的是,当前的文献要么充满了相互矛盾的理论和模糊性,要么数学过于复杂,隐藏了物理见解。在本教程中,我们全面回顾了闪烁噪声上转换理论的演变,并阐明了它们有争议和令人困惑的部分。使用 28-nm CMOS 的商业模拟模型专门比较和数值验证了电压偏置 LC 槽式振荡器(仅 nMOS 和互补)中的两类此类上转换机制。我们发现 2 次和 3 次谐波电流的非电阻端接会导致振荡波形不对称,从而导致闪烁噪声上变频。此外,我们讨论了三种 1/f3 PN 降低机制:波形整形、导通角变窄和栅漏相移。
更新日期:2021-02-01
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