The emerging flexibility need in designing application-specific processors dedicated for modules of digital receiver imposes a new design metric, which is added to the requirements of efficiency and productivity. In order to cope with the emerging flexibility requirement combined with the best performance efficiency, many application-specific processor design approaches have been proposed and investigated. In general, available design approaches that adopt dynamic scheduling of instructions add an overhead due to the instruction decoding. To minimize this overhead, several approaches have been introduced, which opt static scheduling. In this context, No-Instruction-Set-Computer (NISC) concept has been introduced to design application-specific processors without an instruction set. NISC concept proposes that there is no need to first design and then use an instruction set when the hardware is programmed by its designers rather than its users. NISC designing approach offers a good compromise between flexibility, productivity, and quality for the design of a digital system. In our work, NISC approach is explored through the design of flexible and efficient architectures dedicated for digital communication applications which fulfill the requirements imposed by multiple emergent communication standards. This paper introduces briefly the NISC concept and the corresponding design methodology. Also, it provides an overview of the related design approach. In addition, the relevance of NISC in realizing flexible and efficient implementation in the domain of digital communication is demonstrated through two case studies on MIMO turbo detection and universal turbo demapping. Both designed NISC-based architectures have been compared to state-of-the-art ASIP-based architectures using similar computational resources and supporting same flexibility parameters. The obtained results show that the proposed NISC-based architectures provide a significant improvement in execution performance while having reduced implementation costs. The results also illustrates how the control memory requirements depend on the application and the devised architecture choices. In the detector module, the adopted re-usability of allocated resources imposes separate controlling of each component; hence, additional control signals are implied. Whereas for the demapper module, implemented hardware components are considered to perform specific operations and to deal with the same type of data; hence, the number of control signals can be reduced significantly.

在设计专用于数字接收器模块的专用处理器方面出现的新的灵活性需求强加了一个新的设计指标，该指标增加了效率和生产率的要求。为了应对新兴的灵活性要求以及最佳的性能效率，已经提出并研究了许多专用处理器设计方法。通常，由于指令解码，采用动态指令调度的可用设计方法会增加开销。为了最小化此开销，已引入了几种选择静态调度的方法。在这种情况下，引入了无指令集计算机（NISC）概念来设计无指令集的专用处理器。NISC概念提出，当硬件由其设计人员而不是其用户进行编程时，无需先设计然后使用指令集。NISC设计方法为数字系统的设计在灵活性，生产率和质量之间提供了很好的折衷方案。在我们的工作中，通过设计专用于数字通信应用的灵活高效的体系结构来探索NISC方法，这些体系结构可以满足多种紧急通信标准所提出的要求。本文简要介绍了NISC概念和相应的设计方法。此外，它还概述了相关的设计方法。此外，通过两个关于MIMO Turbo检测和通用Turbo解映射的案例研究，证明了NISC在数字通信领域实现灵活高效的实现的相关性。两种设计的基于NISC的体系结构已与使用类似计算资源并支持相同灵活性参数的基于ASIP的最新体系结构进行了比较。获得的结果表明，所提出的基于NISC的体系结构在降低执行成本的同时，显着提高了执行性能。结果还说明了控制存储器要求如何取决于应用程序和设计的体系结构选择。在检测器模块中，所采用的分配资源的可重用性对每个组件进行单独的控制。因此，暗含了其他控制信号。对于解映射器模块，已实现的硬件组件被视为执行特定的操作并处理相同类型的数据；因此，可以显着减少控制信号的数量。