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Fabrication and Reliability Analysis of Nanoscale Magnetic Tunnel Junctions
SPIN ( IF 1.8 ) Pub Date : 2021-01-26 , DOI: 10.1142/s2010324721500028 Yubo Wang 1 , Dongyan Zhao 1 , Yanning Chen 1, 2 , Zhen Fu 1, 2 , Haifeng Zhang 1 , Zhimei Zhou 3 , Yong Wan 3 , Cheng Pan 1, 2 , Fang Liu 1, 2 , Yuandong Yuan 1, 2 , Kaihua Cao 4
SPIN ( IF 1.8 ) Pub Date : 2021-01-26 , DOI: 10.1142/s2010324721500028 Yubo Wang 1 , Dongyan Zhao 1 , Yanning Chen 1, 2 , Zhen Fu 1, 2 , Haifeng Zhang 1 , Zhimei Zhou 3 , Yong Wan 3 , Cheng Pan 1, 2 , Fang Liu 1, 2 , Yuandong Yuan 1, 2 , Kaihua Cao 4
Affiliation
Magnetic tunnel junction with perpendicular magnetic anisotropy (p-MTJ) is the core component in spintronics-based memory, logic and sense devices, the synthetic anti-ferromagnetic (SAF) has been used to fix the reference layer and cancel the stray field in free layer and few works report the SAF-based reliability analysis of p-MTJ nanopillars. Here, we developed a complete set of method for single p-MTJ devices using CMOS compatible process, and manufactured 80-nm diameter p-MTJs with lower performance degrade. The results of our p-MTJs also revealed that anomalous transitions in major resistance versus external magnetic field (R − H ) curves can be assisted with the uncompensated SAF flipping after nanofabrication, even though well magnetostatic matched during film stack design. We have also given a reliability analysis of magnetization states in anomalous major R − H curves and implied that SAF parameters must be designed for etched nanopillars.
中文翻译:
纳米级磁性隧道结的制备及可靠性分析
具有垂直磁各向异性的磁隧道结 (p-MTJ) 是基于自旋电子学的存储器、逻辑和传感设备的核心部件,合成反铁磁 (SAF) 已用于固定参考层并消除自由场中的杂散场层和少数作品报告了基于 SAF 的 p-MTJ 纳米柱的可靠性分析。在这里,我们开发了一套完整的使用 CMOS 兼容工艺的单个 p-MTJ 器件的方法,并制造了具有较低性能退化的 80 nm 直径的 p-MTJ。我们的 p-MTJ 的结果还表明,主要电阻与外部磁场的异常转变(R - H ) 曲线可以通过纳米加工后的无补偿 SAF 翻转来辅助,即使在薄膜堆叠设计期间静磁匹配良好。我们还给出了异常主要磁化状态的可靠性分析R - H 曲线并暗示必须为蚀刻的纳米柱设计 SAF 参数。
更新日期:2021-01-26
中文翻译:
纳米级磁性隧道结的制备及可靠性分析
具有垂直磁各向异性的磁隧道结 (p-MTJ) 是基于自旋电子学的存储器、逻辑和传感设备的核心部件,合成反铁磁 (SAF) 已用于固定参考层并消除自由场中的杂散场层和少数作品报告了基于 SAF 的 p-MTJ 纳米柱的可靠性分析。在这里,我们开发了一套完整的使用 CMOS 兼容工艺的单个 p-MTJ 器件的方法,并制造了具有较低性能退化的 80 nm 直径的 p-MTJ。我们的 p-MTJ 的结果还表明,主要电阻与外部磁场的异常转变(