This article focuses on the characterization and architecture of a new mixed design approach to monolithic CMOS-silicon-photomultiplier (SiPM), where the mixed-signal circuitry as well as the logical concepts are implemented at the die level. The new architecture contains two key areas: 1) a method for sampling, filtering, and converting the electrical signal generated by the SiPM to the digital domain by taking advantage of the nature of the SiPM as an “optical-to-digital converter” and 2) a fully digital configurable method, which requires just one clock generator, enabling sampling at an adjustable time window (gating method) and reduces background noise. We report the design, simulation, and measurement results. The system was fabricated at a low-cost $0.18~\mathrm {[{\mu {\mathrm{ m}}}]}0.18$ - $\mu \text{m}$ CMOS process yet achieves a clock rate of 1 GHz, high timing and photon counting resolution, and low jitter. The reported demonstrator may be applied to 3-D range measurements, light detection and ranging (LIDAR), time-of-flight (ToF) system, and gaming systems.

中文翻译：

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用于 ToF 测量的单片 N+P-CMOS-SiPM 阵列的表征和架构

本文重点介绍单片 CMOS 硅光电倍增管 (SiPM) 的新混合设计方法的特性和架构，其中混合信号电路以及逻辑概念在芯片级实现。新架构包含两个关键领域：1) 利用 SiPM 作为“光数字转换器”的特性，对 SiPM 生成的电信号进行采样、滤波和转换的方法，以及2) 一种全数字可配置方法，只需要一个时钟发生器，可在可调时间窗口（门控方法）进行采样并降低背景噪声。我们报告了设计、模拟和测量结果。该系统以低成本制造 $0.18~\mathrm {[{\mu {\mathrm{ m}}}​​]}0.18$ —— $\mu \text{m}$ CMOS 工艺还实现了 1 GHz 的时钟频率、高时序和光子计数分辨率以及低抖动。报告的演示器可应用于 3-D 距离测量、光探测和测距 (LIDAR)、飞行时间 (ToF) 系统和游戏系统。