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On solving quantified bit-vector constraints using invertibility conditions
Formal Methods in System Design ( IF 0.8 ) Pub Date : 2021-01-18 , DOI: 10.1007/s10703-020-00359-9
Aina Niemetz , Mathias Preiner , Andrew Reynolds , Clark Barrett , Cesare Tinelli

We present a novel approach for solving quantified bit-vector constraints in Satisfiability Modulo Theories (SMT) based on computing symbolic inverses of bit-vector operators. We derive conditions that precisely characterize when bit-vector constraints are invertible for a representative set of bit-vector operators commonly supported by SMT solvers. We utilize syntax-guided synthesis techniques to aid in establishing these conditions and verify them independently by using several SMT solvers. We show that invertibility conditions can be embedded into quantifier instantiations using Hilbert choice expressions and give experimental evidence that a counterexample-guided approach for quantifier instantiation utilizing these techniques leads to performance improvements with respect to state-of-the-art solvers for quantified bit-vector constraints.

中文翻译:

使用可逆条件求解量化位向量约束

我们提出了一种基于计算位向量运算符的符号逆的可满足性模理论 (SMT) 中解决量化位向量约束的新方法。对于 SMT 求解器通常支持的一组有代表性的位向量算子,我们推导出精确表征位向量约束何时可逆的条件。我们利用语法引导的综合技术来帮助建立这些条件,并通过使用多个 SMT 求解器来独立验证它们。我们表明可逆条件可以使用希尔伯特选择表达式嵌入到量词实例化中,并提供实验证据表明,使用这些技术的量词实例化的反例引导方法导致了相对于量化位的最先进求解器的性能改进。矢量约束。
更新日期:2021-01-18
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