This article describes the design of a 32 Gb/s four-level pulse amplitude modulation (PAM- 4) optical transceiver in a 40 nm CMOS technology. At the transmitter side, the laser driver is composed of an asymmetric waveform equalizer, a 3-tap feed-forward equalizer (FFE), and a novel active-back termination (ABT) circuit. The ABT circuit provides a self-tracking, tunable source impedance to match the characteristic impedance of different laser diodes. At the receiver side, the fully integrated optical receiver consists of a transimpedance amplifier (TIA), a variable gain amplifier (VGA), an automatic threshold tracking circuit (ATC), and a quarter-rate decision feedback equalizer (DFE). By using the adaptive ATC, it reduces the BER induced by the harmonic distortion along the signal path by more than 27X under a THD of −20dB. Both the ATC and DFE are automatically adapted by an on-chip sign-sign LMS (SSLMS) engine. Fabricated in TSMC 40 nm CMOS process, the chip area for the transmitter and receiver are about 0.029 mm ² and 0.23 mm ² . The power consumptions are about 146.8 mW and 128.8 mW respectively for the PAM-4 transmitter and receiver.

中文翻译：

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具有40 nm CMOS技术的有源后接端接的32 Gb / s PAM-4光学收发器

本文介绍了采用40 nm CMOS技术的32 Gb / s四级脉冲幅度调制（PAM-4）光收发器的设计。在发射器端，激光驱动器由不对称波形均衡器，3抽头前馈均衡器（FFE）和新颖的有源反向终端（ABT）电路组成。ABT电路提供了一种可自我跟踪的可调源阻抗，以匹配不同激光二极管的特征阻抗。在接收器端，完全集成的光接收器由互阻放大器（TIA），可变增益放大器（VGA），自动阈值跟踪电路（ATC）和四分之一速率判决反馈均衡器（DFE）组成。通过使用自适应ATC，在-20dB的THD下，它可以将沿信号路径的谐波失真引起的BER降低27倍以上。ATC和DFE均由片上符号LMS（SSLMS）引擎自动调整。采用TSMC 40 nm CMOS工艺制造，发射器和接收器的芯片面积约为0.029 mm ²和0.23 mm ² 。PAM-4发送器和接收器的功耗分别约为146.8 mW和128.8 mW。