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Fine-grained Scheduling in Heterogeneous-ISA Architectures
IEEE Computer Architecture Letters ( IF 2.3 ) Pub Date : 2021-01-01 , DOI: 10.1109/lca.2020.3045056
Nirmal Kumar Boran , Shubhankit Rathore , Meet Udeshi , Virendra Singh

Given the ever increasing demand for improved computational capabilities, heterogeneous-ISA multi-core architectures have emerged as a promising alternative to improve single-threaded performance. Such architectures comprise of multiple cores that differ not just in micro-architectural parameters but also in their Instruction Set Architectures (ISAs). Programs have affinity towards different ISAs during its execution based on nature of code and data input. To extract maximum performance gain, we need to ensure that at every point in the program's execution, the program runs on its best affine core with minimum migration overhead. In this letter, we propose a function-wise fine grained scheduling algorithm which schedules every function of a program to its most affined ISA. Results show that our function-based scheduler can achieve speedup of up to 22.9 percent over state-of-the-art in heterogeneous-ISA architectures.

中文翻译:

异构 ISA 架构中的细粒度调度

鉴于对改进计算能力的需求不断增加,异构 ISA 多核架构已成为提高单线程性能的有前途的替代方案。这种架构由多个内核组成,这些内核不仅在微架构参数上不同,而且在指令集架构 (ISA) 上也不同。根据代码和数据输入的性质,程序在其执行期间对不同的 ISA 具有亲和力。为了获得最大的性能增益,我们需要确保在程序执行的每个点上,程序都在其最佳仿射核心上运行,并且迁移开销最小。在这封信中,我们提出了一种函数式细粒度调度算法,该算法将程序的每个函数调度到其最相关的 ISA。
更新日期:2021-01-01
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