This paper presents an improved design of reconfigurable infinite impulse response (IIR) filter that can be widely used in real-time applications. The proposed IIR design is realized by parallel–pipeline-based finite impulse response (FIR) filter. The FIR filters have excellent characteristics such as high stability, linear phase response and fewer finite precision errors. Hence, FIR-based IIR design is more attractive and selective in signal processing. In addition, the other two modern techniques such as look-ahead and two-level pipeline IIR filter designs are also discussed. All the said designs have been described in hardware description language and tested on Xilinx Virtex-5 field programmable gate array board. The implementation results show that the proposed FIR-based IIR design yields better performance in terms of hardware utilization, higher operating speed and lower power consumption compared to conventional IIR filter.

中文翻译：

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FPGA 上的高性能 IIR 滤波器实现

本文提出了一种可广泛用于实时应用的可重构无限脉冲响应 (IIR) 滤波器的改进设计。建议的 IIR 设计是通过基于并行管道的有限脉冲响应 (FIR) 滤波器实现的。FIR滤波器具有稳定性高、相位响应线性、有限精度误差少等优良特性。因此，基于 FIR 的 IIR 设计在信号处理中更具吸引力和选择性。此外，还讨论了其他两种现代技术，例如前瞻和两级流水线 IIR 滤波器设计。所有上述设计都用硬件描述语言进行了描述，并在 Xilinx Virtex-5 现场可编程门阵列板上进行了测试。实施结果表明，所提出的基于 FIR 的 IIR 设计在硬件利用率方面具有更好的性能，