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Quantitative Evaluation of Hardware Binary Stochastic Neurons
arXiv - CS - Emerging Technologies Pub Date : 2021-01-01 , DOI: arxiv-2101.00147
Orchi Hassan, Supriyo Datta, Kerem Y. Camsari

Recently there has been increasing activity to build dedicated Ising Machines to accelerate the solution of combinatorial optimization problems by expressing these problems as a ground-state search of the Ising model. A common theme of such Ising Machines is to tailor the physics of underlying hardware to the mathematics of the Ising model to improve some aspect of performance that is measured in speed to solution, energy consumption per solution or area footprint of the adopted hardware. One such approach to build an Ising spin, or a binary stochastic neuron (BSN), is a compact mixed-signal unit based on a low-barrier nanomagnet based design that uses a single magnetic tunnel junction (MTJ) and three transistors (3T-1MTJ) where the MTJ functions as a stochastic resistor (1SR). Such a compact unit can drastically reduce the area footprint of BSNs while promising massive scalability by leveraging the existing Magnetic RAM (MRAM) technology that has integrated 1T-1MTJ cells in ~Gbit densities. The 3T-1SR design however can be realized using different materials or devices that provide naturally fluctuating resistances. Extending previous work, we evaluate hardware BSNs from this general perspective by classifying necessary and sufficient conditions to design a fast and energy-efficient BSN that can be used in scaled Ising Machine implementations. We connect our device analysis to systems-level metrics by emphasizing hardware-independent figures-of-merit such as flips per second and dissipated energy per random bit that can be used to classify any Ising Machine.

中文翻译:

硬件二进制随机神经元的定量评估

最近,人们越来越多地建造专用的Ising机器,以通过将这些问题表示为Ising模型的基态搜索来加快组合优化问题的解决速度。这种Ising Machines的一个共同主题是根据Ising模型的数学来调整底层硬件的物理特性,以改善性能的某些方面,这些方面可以通过解决方案的速度,每个解决方案的能耗或所采用硬件的占地面积来衡量。一种构建Ising自旋或二进制随机神经元(BSN)的方法是一种基于低势垒纳米磁铁的设计的紧凑型混合信号单元,该设计使用单个磁隧道结(MTJ)和三个晶体管(3T- 1MTJ),其中MTJ用作随机电阻(1SR)。这种紧凑的单元可以通过利用现有的将1T-1MTJ单元集成到〜Gbit密度的磁RAM(MRAM)技术,在保证大规模扩展性的同时,大大减少BSN的面积。但是,可以使用提供自然波动电阻的不同材料或设备来实现3T-1SR设计。通过扩展先前的工作,我们通过对必要和足够的条件进行分类,从总体角度评估硬件BSN,以设计可用于规模化Ising Machine实现的快速,节能的BSN。通过强调独立于硬件的品质因数(例如每秒的翻转和可用于对任何Ising机器进行分类的随机位的耗散能量),我们将设备分析与系统级指标联系起来。
更新日期:2021-01-05
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