Model checking is an effective technique for formal verification of hardware security properties in order to detect security vulnerabilities. However, a major challenge lies in state space explosion. In this work, we propose methods to accelerate hardware security verification and vulnerability detection through state space reduction. Specifically, we reduce state space of formal model by performing value reduction and transition relation reduction. The control flow and data dependent graphs control the process of value reduction and transition relation reduction. In addition, we provide an approach that allows the automated mining of security properties from register-transfer-level hardware designs. Experimental results using Trust-HUB benchmarks have demonstrated that our proposed methods can significantly reduce the complexity of the formal model and thus the formal security verification time for hardware Trojan detection.

模型检查是一种有效的技术，用于对硬件安全属性进行形式验证，以检测安全漏洞。然而，主要挑战在于国家空间爆炸。在这项工作中，我们提出了通过减少状态空间来加速硬件安全验证和漏洞检测的方法。具体来说，我们通过执行价值减少和转移关系减少来减少形式模型的状态空间。控制流图和数据相关图控制值缩减和过渡关系缩减的过程。此外，我们提供了一种方法，该方法允许从寄存器传输级硬件设计中自动挖掘安全属性。