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A New Design of a Carry-Save Adder Based on Quantum-Dot Cellular Automata
Iranian Journal of Science and Technology, Transactions of Electrical Engineering ( IF 2.4 ) Pub Date : 2021-01-05 , DOI: 10.1007/s40998-020-00395-5
Behrooz Hasani , Nima Jafari Navimipour

Quantum-dot cellular automata (QCA) technology has been known as an appropriate paradigm for implementing low power consumption digital circuits and different high-performance computations at nanoscale. Considering its nature, this technology has shallow energy losses. Besides, an adder is one of the main parts in the digital circuit designs. Moreover, full adder circuits are the basic units in the digital logic and arithmetic circuits. An emerging three-layer four-bit QCA-based carry-save adder (CSA) circuit is presented in this article. The proposed design offers good performance regarding the delay, area size, and cell number compared to existing ones. The suggested four-bit QCA-based CSA circuit has been depending on a new dedicated QCA full adder circuit. The proposed architectures are simulated with the utilization of the QCADesigner tool version 2.0.3. The outcomes of the simulation have proven that the improved circuit provides a significant development for cell number and area possession compared to previous single-layer and multilayer circuits, and the design leads to around 33.9% improvement in cell number in comparison with the best-presented QCA-based CSA design. Moreover, the proposed CSA architecture utilizes 347 QCA cells.

中文翻译:

基于量子点元胞自动机的进位保存加法器的新设计

量子点元胞自动机 (QCA) 技术被认为是在纳米级实现低功耗数字电路和不同高性能计算的合适范例。考虑到其性质,该技术的能量损失较浅。此外,加法器是数字电路设计中的主要部件之一。此外,全加器电路是数字逻辑和算术电路中的基本单元。本文介绍了一种新兴的基于三层四位 QCA 的进位保存加法器 (CSA) 电路。与现有设计相比,所提出的设计在延迟、面积大小和单元数量方面提供了良好的性能。建议的基于四位 QCA 的 CSA 电路依赖于新的专用 QCA 全加器电路。使用 QCADesigner 工具 2.0.3 版对建议的架构进行了模拟。仿真结果证明,与之前的单层和多层电路相比,改进后的电路在单元数量和面积占有率方面有了显着发展,与最佳呈现相比,该设计使单元数量提高了约 33.9%。基于 QCA 的 CSA 设计。此外,建议的 CSA 架构使用 347 个 QCA 单元。
更新日期:2021-01-05
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