The relationship between current loop bandwidth and time delay was analyzed on the basis of the mathematical model of a current loop. The time delays generated by double sampling and pulse-width modulation (PWM) duty cycle double update (DSDU) and immediate sampling and PWM duty cycle immediate update (ISIU) and their effects on the current loop bandwidth were compared. Combining DSDU and ISIU, a novel hybrid current loop timing control method was proposed to solve the problems of insufficient bandwidth expansion and low voltage output capability. ISIU was used when calculation delay is less than or equal to the action time of the zero voltage vector to expand the bandwidth. Meanwhile, DSDU was adopted when calculation delay is greater than the action time of the zero voltage vector to improve voltage output capability. Experimental results proved that the proposed method can reduce current loop delay to increase bandwidth without changing switching frequency and limiting output voltage.

基于电流环路的数学模型，分析了电流环路带宽与时间延迟之间的关系。比较了两次采样和脉冲宽度调制（PWM）占空比两次更新（DSDU）和立即采样和PWM占空比立即更新（ISIU）所产生的时间延迟及其对电流环路带宽的影响。结合DSDU和ISIU，提出了一种新颖的混合电流环路时序控制方法，以解决带宽扩展不足和低电压输出能力的问题。当计算延迟小于或等于零电压矢量的作用时间时，使用ISIU扩展带宽。同时，当计算延迟大于零电压矢量的作用时间时，采用DSDU，以提高电压输出能力。