This letter presents a fully integrated Ku-band low-noise amplifier (LNA) with a large-size transistor using 65-nm bulk complementary metal–oxide–semiconductor (CMOS) technology. To achieve an ultralow-noise figure, an optimization methodology balancing the ON-chip gate inductor and the parasitic capacitance of the large-size device is introduced. Using a voltage supply of 1 V, the proposed LNA has a 1.66-dB noise figure and 32.48-dB gain and, thus, outperforms other reported Ku-band bulk CMOS LNAs in these two respects. The LNA achieves the highest figure of merit I among reported Ku-band CMOS, silicon germanium, and gallium arsenide hetero-junction bipolar transistor LNAs. The LNA consumes a dc power of 22 mW and occupies a core area of $0.58\,\,{\times }\,\,0.43\,\,{\text {mm}}^{2}$ .

中文翻译：

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具有大尺寸晶体管的超低噪声系数和高增益 Ku 波段批量 CMOS 低噪声放大器

这封信提供了一个完全整合的 库带大尺寸晶体管的带低噪声放大器 (LNA)，采用 65 纳米体互补金属氧化物半导体 (CMOS) 技术。为了实现超低噪声系数，引入了一种平衡片上栅极电感器和大尺寸器件寄生电容的优化方法。使用 1 V 电压电源，建议的 LNA 具有 1.66-dB 噪声系数和 32.48-dB 增益，因此优于其他报道的库-bandbulk CMOS LNA 在这两个方面。LNA 达到了报告中最高的品质因数 I库带 CMOS、硅锗和砷化镓异质结双极晶体管 LNA。LNA 消耗 22 mW 的直流功率，占用的核心面积为 $0.58\,\,{\times }\,\,0.43\,\,{\text {mm}}^{2}$ .