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A low noise current readout architecture with 160 dB transimpedance gain and 1.3 MHz bandwidth
Microelectronics Journal ( IF 2.2 ) Pub Date : 2020-12-31 , DOI: 10.1016/j.mejo.2020.104984
Wei Wang , Wenxin Zeng , Sameer Sonkusale

This paper proposes a low-noise readout circuit with a noise floor of 11 fArms/sq(Hz) and a bandwidth of 1.3 MHz. The novel electrostatic discharge (ESD) leakage current cancellation stage allows the circuit to detect sub-pA range current input. A total trans-impedance gain of 160 dB is obtained by a current preamplification stage with a 100 × current gain followed by a transimpedance amplifier (TIA) with a 1 Mohm feedback resistive gain. The reader is designed in a 0.18 μm CMOS process and consumes 5.6 mW from a 1.8 V supply.



中文翻译:

具有160 dB跨阻增益和1.3 MHz带宽的低噪声电流读出架构

本文提出了一种低噪声读出电路,其本底噪声为11 fA rms / sqHz),带宽为1.3 MHz。新颖的静电放电(ESD)泄漏电流消除级使电路能够检测出低于pA范围的电流输入。通过具有100×电流增益的电流预放大级,然后是具有1 Mohm反馈电阻增益的跨阻放大器(TIA),可获得160 dB的总跨阻增益。读者被设计成0.18  μ米CMOS工艺和从1.8 V电源消耗5.6毫瓦。

更新日期:2021-01-10
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