Purpose

This paper aims to develop a mathematical model for four-lobe memristor (FLM) element. The four-lobe memristive behaviour can be used in realization of hyperchaotic oscillators and implementation of multi-bit memories. For verification of the developed mathematical framework, two FLM circuit emulators have been presented using VDCC and IC LM13700, respectively.

Design/methodology/approach

A mathematical model for FLM has been developed in which, the condition for the existence of symmetrical four lobes, instances and coordinates of the end points of lobes has been derived and presented. Using this mathematical framework, a FLM emulator based on VDCC has been developed. To validate the possibility of practical implementation of FLM concept, an IC LM13700-based circuit has also been developed. The workability of VDCC based circuit has been verified by running simulations in PSPICE environment using CMOS VDCC model. Similarly, the behaviour of LM13700 IC-based circuit has been confirmed by SPICE model of LM13700 IC.

Findings

It has been shown mathematically that under certain conditions, third-order flux dependent equation of memductance can be used to generate four lobes on the transient v-i plane. Also, two FLM emulators without using any voltage multiplier circuit/IC have been reported.

Originality/value

From the best knowledge of the authors, there are no such FLM emulators that have been reported in literature so far, which operates at practical operating frequencies.

中文翻译：

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四叶忆阻行为的数学模型和电路仿真器的开发

目的

本文旨在为四叶忆阻器（FLM）元件建立数学模型。四瓣忆阻行为可用于超混沌振荡器的实现和多位存储器的实现。为了验证开发的数学框架，已经分别展示了两个使用VDCC和IC LM13700的FLM电路仿真器。

设计/方法/方法

已经建立了FLM的数学模型，其中推导并提出了对称的四个叶的存在条件，叶的端点的实例和坐标。利用这种数学框架，已经开发了基于VDCC的FLM仿真器。为了验证FLM概念实际实施的可能性，还开发了一种基于LM13700的IC电路。通过使用CMOS VDCC模型在PSPICE环境中运行仿真，已经验证了基于VDCC的电路的可操作性。同样，LM13700 IC的SPICE模型已经证实了基于LM13700 IC的电路的行为。

发现

数学上已经表明，在某些条件下，可以使用依赖于磁通的三阶磁通方程来在瞬态vi平面上生成四个波瓣。另外，已经报告了两个不使用任何电压倍增器电路/ IC的FLM仿真器。

创意/价值

据作者所知，到目前为止，还没有文献报道这种以实际工作频率运行的FLM仿真器。