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A 600V split-gate VDMOS with integrated trench MOS barrier Schottky
International Journal of Electronics ( IF 1.3 ) Pub Date : 2021-01-04 , DOI: 10.1080/00207217.2020.1870740
Xiaopei Chen 1 , Quanyuan Feng 1
Affiliation  

ABSTRACT

In this paper, a novel 600 V split-gate VDMOS with the integrated trench MOS barrier Schottky (TMBS) is proposed to reduce the specific gate-drain charge (Qgd,sp) and specific reverse recovery charge (QRR). For the proposed device, the TMBS is distributed in the JFET region, and it offers a majority of the freewheeling current (IF) during the reverse-recovery period resulted in a great reduction in QRR. The TMBS also works as the vertical field plates (VFPs) in the blocking mode; therefore, the breakdown voltage (BV) is not degraded when the anti-JFET implantation is introduced to decreased the specific on-resistance (Ron,sp). Compared with the conventional VDMOS (C-VDMOS), the simulation shows that QRR and Qgd,sp of the proposed structure are reduced by 68.8% and 78.4%, respectively, when the work function of Schottky contact is 4.85 eV. Moreover, Ron,sp is also decreased by 25.1%.



中文翻译:

具有集成沟槽 MOS 势垒肖特基的 600V 分栅 VDMOS

摘要

在本文中,提出了一种具有集成沟槽 MOS 势垒肖特基 (TMBS) 的新型 600 V 分栅 VDMOS,以减少特定的栅漏电荷 ( Q gd,sp ) 和特定的反向恢复电荷 (Q RR )。对于所提出的器件,TMBS 分布在 JFET 区域,它在反向恢复期间提供了大部分续流电流 (I F ),从而大大降低了 Q RR。TMBS 在阻塞模式下也用作垂直场板 (VFP);因此,击穿电压(BV)没有劣化时的抗JFET注入引入降低了导通电阻([R上,SP)。与传统的 VDMOS (C-VDMOS) 相比,仿真表明,当肖特基接触的功函数为 4.85 eV 时,所提出结构的Q RRQ gd,sp分别降低了 68.8% 和 78.4%。此外,R on,sp也降低了 25.1%。

更新日期:2021-01-04
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