Time-interleaved analog-to-digital converters (TIADCs) have been considered as a very promising solution for high-speed direct sampling receivers. However, channel mismatches reduce the TIADC’s performance significantly. Therefore, calibration of these mismatches is emerging to maintain the performance of these TIADCs. This paper proposes a fully digital background calibration technique for multiple deviations including offset, gain, and timing mismatches. Offset and gain deviations in TIADCs are sequentially calibrated by taking the average value of the output samples, and calculating the ratios of power, respectively. Then, the timing mismatch is compensated by using the Hadamard matrix and the adaptive recursive least square (RLS) algorithm. The proposed calibration technique is proven through the simulation results for signal-to-noise-and-distortion (SNDR), spurious-free dynamic range (SFDR) and time convergence. As a result, the performance of TIADC is improved by 40.98 dB and 70.64 dB for SNDR and SFDR, respectively.

时间交错的模数转换器（TIADC）被认为是高速直接采样接收器非常有前途的解决方案。但是，通道不匹配会大大降低TIADC的性能。因此，出现了这些不匹配的校准，以维持这些TIADC的性能。本文针对多种偏差（包括失调，增益和时序失配）提出了一种全数字背景校准技术。通过获取输出采样的平均值并分别计算功率比，可以依次校准TIADC中的失调和增益偏差。然后，通过使用Hadamard矩阵和自适应递归最小二乘（RLS）算法来补偿时序不匹配。通过对信噪比和失真（SNDR），无杂散动态范围（SFDR）和时间收敛的仿真结果证明了所提出的校准技术。结果，对于SNDR和SFDR，TIADC的性能分别提高了40.98 dB和70.64 dB。