This article presents a root-cause investigation of system-level electrostatic discharge-induced soft failures in a semi-custom microcontroller test chip. Sources of failures include clock glitches, reset glitches, and bit flips in memory. The affected circuit blocks are identified with the aid of a scan chain and memory read-out programs; on-chip voltage monitors allow us to establish whether those failures are correlated with the power supply noise. Simulations are used to study the spatial extent of the noise on the power nets and the signal pins. The effect of down-bonding on the supply noise is investigated using both measurement and simulation.

中文翻译：

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CMOS 微控制器中系统级 ESD 引起的软故障分析

本文介绍了半定制微控制器测试芯片中系统级静电放电引起的软故障的根本原因调查。故障来源包括时钟故障、复位故障和内存中的位翻转。借助扫描链和存储器读出程序识别受影响的电路块；片上电压监视器使我们能够确定这些故障是否与电源噪声相关。仿真用于研究电源网络和信号引脚上噪声的空间范围。使用测量和仿真来研究向下连接对电源噪声的影响。