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Ionizing radiation damage in 65 nm CMOS technology: Influence of geometry, bias and temperature at ultra-high doses
Microelectronics Reliability ( IF 1.6 ) Pub Date : 2021-01-01 , DOI: 10.1016/j.microrel.2020.114016
G. Borghello , E. Lerario , F. Faccio , H.D. Koch , G. Termo , S. Michelis , F.J. Marquez , F.R. Palomo , F. Muñoz

Abstract We studied the radiation response of 3 different 65 CMOS planar technologies at the ultra-high doses expected to be reached in the HL-LHC, the upgraded large hadron collider of CERN. All the processes studied are sensitive to radiation and show similar degradation mechanisms and, albeit with different intensities, similar dependencies on device geometry, applied polarization and temperature. The results obtained confirmed that the performance of MOS transistors exposed to ultra-high doses is mainly affected by radiation-induced charge trapped in auxiliary oxides such as shallow trench isolation oxides and spacers. The extensive data collected has been used to develop guidelines to qualify to ultra-high doses ASICs designed in the 65 technology node.

中文翻译:

65 nm CMOS 技术中的电离辐射损伤:超高剂量下几何形状、偏置和温度的影响

摘要 我们研究了 3 种不同的 65 CMOS 平面技术在 HL-LHC(欧洲核子研究中心升级的大型强子对撞机)中预期达到的超高剂量下的辐射响应。研究的所有过程都对辐射敏感,并显示出相似的降解机制,尽管强度不同,但对器件几何形状、应用极化和温度的依赖性相似。获得的结果证实,暴露于超高剂量的 MOS 晶体管的性能主要受捕获在辅助氧化物(例如浅沟槽隔离氧化物和间隔物)中的辐射诱导电荷的影响。收集的大量数据已用于制定准则,以符合在 65 技术节点中设计的超高剂量 ASIC。
更新日期:2021-01-01
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