Abstract This paper includes a design analysis of an inductorless low-power (LP) low-noise amplifier (LNA) with active load for Ultra Wide Band (UWB) applications. The proposed LNA consists of two parallel paths, one is the common source (CS) path and second is the CG path. The CG path has the edge advantage of improving overall Noise figure (NF) due to wide band impedance matching in UWB, while the CS path provides high power gain. A method for noise cancellation is adopted, to reduce the noise of CS path with the help of CG path. The proposed LNA successfully simulated in 90 nm CMOS technology. The results of proposed work indicate optimization at frequency 5.70 GHz with 3 dB bandwidth of 4.3 GHz–8.9 GHz. All simulations have been done for a range of frequency 03 GHz–13 GHz in Cadence virtuoso software. The results quoted 1.15 dB NF, −18.12 dB S11, 13.7 dB S21, maximum operating power gain (GP) 11.756 dB at frequency 5.7 GHz and available power gain (GA) is 10.17 dB at frequency 8.61 GHz, with 0.6 V, 0.92 mW broad band LNA.

中文翻译：

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使用噪声消除技术的无电感有源低功耗 UWB LNA 设计分析

摘要 本文包括对用于超宽带 (UWB) 应用的具有有源负载的无电感器低功耗 (LP) 低噪声放大器 (LNA) 的设计分析。建议的 LNA 由两条并行路径组成，一条是公共源 (CS) 路径，第二条是 CG 路径。由于 UWB 中的宽带阻抗匹配，CG 路径具有改善整体噪声系数 (NF) 的优势，而 CS 路径提供高功率增益。采用噪声消除方法，借助CG路径降低CS路径的噪声。建议的 LNA 在 90 nm CMOS 技术中成功模拟。建议工作的结果表明在 5.70 GHz 频率下进行了优化，3 dB 带宽为 4.3 GHz–8.9 GHz。所有模拟都是在 Cadence virtuoso 软件中针对 03 GHz–13 GHz 的频率范围完成的。结果引用了 1.15 dB NF，-18。