This paper presents an FPGA-based Digital Real-Time Simulator (DRTS) platform for Traveling-Wave Relay Testing (TWRT). Traveling-Wave Relays (TWRs) have relatively high sampling rate, as compared to traditional relays, and operate based on the high-frequency response of the power system. Therefore, performing Hardware-In-the-Loop (HIL) tests for a TWR requires i) high resolution, i.e., small simulation time-step and ii) accurate transmission line model to ensure proper replication of traveling waves subsequent to faults. These requirements introduce challenges for DRTS platforms. The envisioned platform in this work comprises an FPGA-based DRTS hosted by a CPU-based platform where the small time-step calculations are conducted by the former. A new state-space realization of the Frequency-Dependent Phase-Domain (FDPD) line model is introduced which enables a fixed hardware design, capable of accommodating its real and imaginary poles. The adopted solution approach enables the parallel solution of the FDPD model and network equations to maximize parallelism and facilitates the use of small time-steps. Performance and accuracy of the proposed DRTS are evaluated and verified against off-line simulation results. The platform is employed for closed-loop HIL testing of a commercial TWR and the results are reported.

中文翻译：

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用于行波继电器硬件在环测试的基于 FPGA 的数字实时模拟器

本文介绍了一种基于 FPGA 的数字实时模拟器 (DRTS) 平台，用于行波继电器测试 (TWRT)。与传统继电器相比，行波继电器 (TWR) 具有相对较高的采样率，并且基于电力系统的高频响应运行。因此，对 TWR 执行硬件在环 (HIL) 测试需要 i) 高分辨率，即小的仿真时间步长和 ii) 准确的传输线模型，以确保正确复制故障后的行波。这些要求给 DRTS 平台带来了挑战。这项工作中设想的平台包括由基于 CPU 的平台托管的基于 FPGA 的 DRTS，其中小时间步长计算由前者进行。引入了频率相关相域 (FDPD) 线模型的新状态空间实现，它支持固定硬件设计，能够适应其实极和虚极。所采用的求解方法使 FDPD 模型和网络方程的并行求解能够最大限度地提高并行性，并促进小时间步长的使用。所提出的 DRTS 的性能和准确性将根据离线模拟结果进行评估和验证。该平台用于商用 TWR 的闭环 HIL 测试，并报告结果。所提出的 DRTS 的性能和准确性将根据离线模拟结果进行评估和验证。该平台用于商用 TWR 的闭环 HIL 测试，并报告结果。所提出的 DRTS 的性能和准确性将根据离线模拟结果进行评估和验证。该平台用于商用 TWR 的闭环 HIL 测试，并报告结果。