This letter presents a truly balanced $E$ -band frequency quadrupler in 22 nm fully depleted silicon-on-insulator CMOS. The quadrupler comprises a chain of two truly balanced frequency push–push doubler (PPD). An innovative layout floorplan shrinks the silicon area utilization of the truly balanced PPDs by 30% and improves the state-of-the-art. Thanks to the balanced topology, the quadrupler achieves a high total efficiency of 2.9% in conjunction with conversion gain of 3.1 dB. The quadrupler exhibits a 3-dB bandwidth from 71 to 81 GHz with an output power of 3.1 dBm, and is therefore, suitable to be a local oscillator (LO) multiplier and driver at once. The chip draws only 70 mW while supplied from a single voltage of 0.8 V, and occupies 0.38 mm 2 of chip area.

中文翻译：

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22-nm FDSOI CMOS 中的 3.1-dBm E-Band 真正平衡频率四倍频器

这封信展示了 22 nm 完全耗尽型绝缘体上硅 CMOS 中真正平衡的 $E$ 频段频率四倍频器。四倍频器由两个真正平衡的频率推推倍频器 (PPD) 组成。创新的布局平面图将真正平衡的 PPD 的硅面积利用率缩小了 30%，并提高了最先进的水平。由于采用平衡拓扑，四倍器实现了 2.9% 的高总效率和 3.1 dB 的转换增益。四倍频器在 71 至 81 GHz 范围内具有 3 dB 带宽，输出功率为 3.1 dBm，因此适合同时用作本地振荡器 (LO) 乘法器和驱动器。该芯片在由 0.8 V 的单电压供电时仅消耗 70 mW，并占用 0.38 mm 2 的芯片面积。