Hardware accelerators are widely used as computationally-intensive cores in consumer electronics (CE) applications. However security and speed of such hardware accelerators, that are responsible for computing data-intensive tasks, play an important role in improving consumer experience in terms of safety and performance. This article presents novel low power multi-modal hardware accelerator architectures viz. application specific processor and functionally reconfigurable processor for image processing filter of $3\times 3$ kernel matrix size. In the proposed functionally reconfigurable processor of $3\times 3$ filter, the same design can be used for five different image processing filters - blurring, sharpening, vertical embossment, horizontal embossment and Laplace edge detection, by varying control input. Further, application specific processor designs of these five types of $3\times 3$ filters are also presented in this article. Additionally, application specific processor architecture of $5\times 5$ filter kernel matrix size is also reported in this article. The results confirm that the proposed hardware accelerators achieve strong security and low design cost.

中文翻译：

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用于图像处理过滤器的混淆硬件加速器 - 特定应用和功能可重新配置的处理器

硬件加速器被广泛用作消费电子 (CE) 应用中的计算密集型内核。然而，负责计算数据密集型任务的此类硬件加速器的安全性和速度在提高安全性和性能方面的消费者体验方面发挥着重要作用。本文介绍了新颖的低功耗多模式硬件加速器架构，即。专用处理器和功能可重构处理器，用于图像处理滤波器 $3\times 3$ 核矩阵大小。在提出的功能可重构处理器中 $3\times 3$ 过滤器，通过改变控制输入，相同的设计可用于五种不同的图像处理过滤器 - 模糊、锐化、垂直浮雕、水平浮雕和拉普拉斯边缘检测。此外，这五种类型的应用程序特定处理器设计 $3\times 3$ 本文还介绍了过滤器。此外，应用特定的处理器架构 $5\乘以5$ 本文还报告了过滤器内核矩阵大小。结果证实，所提出的硬件加速器实现了强大的安全性和低设计成本。