This article presents a 0.5-V RF transceiver fully compliant with Bluetooth low energy (BLE) standards. The receiver (RX) fabricated in a 22-nm fully depleted silicon on insulator (FD-SOI) process achieves a sensitivity of −96.4 dBm, an intermodulation tolerance of −27 dBm for interferers at 6- and 12-MHz offsets, while consuming 1.9 mW. An RX-chain with a gain-programmable low-noise transconductance amplifier (LNTA) provides good linearity over a wide input power range. The LNTA changes amplifier topology according to the gain setting. It achieves a gain range of 41 dB and the IIP3 of −13 dBm at maximum gain. The proposed asynchronous SAR-ADC-based time-to-digital converter (TDC) for the all-digital phase-locked loop (ADPLL) is suitable for low-voltage operation and low-power consumption. It achieves a differential nonlinearity (DNL) of ±0.62 LSB and an integral nonlinearity (INL) of ±0.63 LSB.

中文翻译：

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具有 1.9mW RX 的 0.5V BLE 收发器可实现 -96.4dBm 的灵敏度和 -27dBm 的容差以应对来自 6MHz 和 12MHz 偏移的干扰源的互调

本文介绍了一种完全符合低功耗蓝牙 (BLE) 标准的 0.5V 射频收发器。采用 22-nm 全耗尽绝缘体上硅 (FD-SOI) 工艺制造的接收器 (RX) 的灵敏度为 -96.4 dBm，对于 6-MHz 和 12-MHz 偏移处的干扰的互调容限为 -27 dBm，同时消耗1.9 兆瓦。带有增益可编程低噪声跨导放大器 (LNTA) 的 RX 链可在宽输入功率范围内提供良好的线性度。LNTA 根据增益设置改变放大器拓扑。它在最大增益下实现了 41 dB 的增益范围和 −13 dBm 的 IIP3。所提出的用于全数字锁相环 (ADPLL) 的基于异步 SAR-ADC 的时间数字转换器 (TDC) 适用于低电压操作和低功耗。它实现了 ±0 的微分非线性 (DNL)。