We demonstrate a novel form of transfer characteristics in substrate engineered MoS₂ field effect transistors. Robust hysteresis with stable threshold voltages and a large gate voltage window is observed, which is suppressed at low temperatures. We analyse the dependence of the device characteristics on gate voltage range, gate stressing and sweep rates. We infer that the hysteresis originates from artificially created charged traps near the MoS₂-SiO₂ interface. These charge traps act as long range Coulomb scatterers and are screened at high carrier densities. The hysteresis is strongly suppressed in measurements on wafers devoid of the substrate treatment, providing a new extrinsic route to carefully tune the transfer characteristics.

中文翻译：

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使用基板工程设计MoS2晶体管的传输特性和磁滞

我们展示了衬底工程MoS ₂场效应晶体管中传输特性的一种新型形式。观察到具有稳定的阈值电压和较大的栅极电压窗口的鲁棒滞后现象，在低温条件下可以抑制这种滞后现象。我们分析了器件特性对栅极电压范围，栅极应力和扫描速率的依赖性。我们推断，滞后现象是由MoS ₂ -SiO ₂界面附近的人工产生的电荷陷阱引起的。这些电荷陷阱充当远程库仑散射体，并在高载流子密度下进行筛选。在没有进行基板处理的晶圆上的测量中，磁滞现象得到了极大的抑制，从而提供了一种新的外部途径来仔细调整传输特性。