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Methodology to optimize and reduce the total gate area of robust operational transconductance amplifiers by using diamond layout style for MOSFETs
Analog Integrated Circuits and Signal Processing ( IF 1.4 ) Pub Date : 2020-11-22 , DOI: 10.1007/s10470-020-01750-6
José Roberto Banin Júnior , Rodrigo Alves de Lima Moreto , Gabriel Augusto da Silva , Carlos Eduardo Thomaz , Salvador Pinillos Gimenez

This paper describes a pioneering methodology to design, optimize, and reduce the total gate area of robust Operational Transconductance Amplifiers (OTAs). The Single-Ended Single-Stage (SESS) OTA has been chosen to validate the proposed technique by using the 180 nm planar Complementary Metal-Oxide-Semiconductor (CMOS) Integrated Circuits (ICs) technology. The Electronic Design Automationtool, named iMTGSPICE, was used to design and optimize the SESS OTA. There are several heuristics optimization techniques of Artificial Intelligence to optimize analog and radio-frequency CMOS ICs, but we have selected to use the Genetic Algorithm because it presents the best optimization performance among the other algorithms previously studied. This paper also describes a procedure of converting the Conventional planar MOSFETs (rectangular gate shape) into the Diamond MOSFETs (hexagonal gate shape) with the same electrical performance. Furthermore, it is proposed a procedure to simulate the Diamond MOSFETs (DMs) in the Simulation Program with Integrated Circuit Emphasis (SPICE) because there is still no SPICE model to perform the DM. Additionally, this work proposes a methodology to layout OTAs with Diamond MOSFETs, regarding different values of aspect ratios. The main result of this work reveals a total gate area reduction of approximately 30% of a robust OTA implemented with Diamond MOSFETs, with an alpha angle (α) equal to 45°, with respect to the one observed in the robust OTA implemented with standard MOSFETs, maintaining practically the same electrical performance and robustness.



中文翻译:

通过使用MOSFET的菱形布局样式来优化和减小鲁棒运算跨导放大器的总栅极面积的方法

本文介绍了一种设计,优化和减小鲁棒运算跨导放大器(OTA)总栅极面积的开创性方法。已选择单端单级(SESS)OTA通过使用180 nm平面互补金属氧化物半导体(CMOS)集成电路(IC)技术来验证所提出的技术。电子设计自动化工具,名为iMTGSPICE,用于设计和优化SESS OTA。有几种人工智能的启发式优化技术可以优化模拟和射频CMOS IC,但我们选择使用遗传算法是因为它在先前研究的其他算法中表现出最佳的优化性能。本文还描述了将常规平面MOSFET(矩形栅极形状)转换为具有相同电性能的Diamond MOSFET(六角形栅极形状)的过程。此外,由于仍然没有SPICE模型来执行DM,因此提出了在具有集成电路重点的仿真程序(SPICE)中对Diamond MOSFET(DM)进行仿真的过程。此外,针对纵横比的不同值,这项工作提出了一种使用Diamond MOSFET布局OTA的方法。这项工作的主要结果表明,与采用标准MOSFET的坚固型OTA相比,采用Diamond MOSFET实施的坚固型OTA的总栅极面积减少了约30%,α角(α)等于45°。 MOSFET,保持几乎相同的电气性能和鲁棒性。

更新日期:2020-11-22
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