Recently, second generation voltage conveyor (VCII)-based transimpedance amplifiers (TIAs) have begun to find their way in different applications, among which, silicon photomultipliers (SiPMs) interfacing circuitry. There are many advantages which make VCII-based TIAs attractive over conventional circuits: the intrinsic low impedance at VCII current input Y port is very helpful to mitigate the effect of high value sensor capacitance and provides fast response time; the achieved bandwidth is high and due to current mode operation; the circuits enjoy the low-voltage low-power features. As signal-to-noise ratio is a crucial parameter in SiPMs interface circuit applications, here we consider the noise specifications and optimization of VCII-based SiPM interface circuits. The noise model of VCII is introduced and equivalent noise of a VCII-based interface circuit is derived. Methods to optimize trade-offs existing between key parameters including power consumption, gain and noise performance are discussed. Simulation results are also provided showing a considerable reduction of two orders of magnitude in most of the noise performances when compared to the previous work while preserving other performance parameters.

最近，基于第二代电压传送器（VCII）的跨阻放大器（TIA）已开始在不同的应用中找到自己的方式，其中包括硅光电倍增管（SiPM）接口电路。与传统电路相比，基于VCII的TIA具有许多优势：VCII电流输入Y端口的固有低阻抗非常有助于减轻高值传感器电容的影响并提供快速响应时间；所获得的带宽很高，并且归因于当前模式操作；电路具有低压低功耗特性。由于信噪比是SiPM接口电路应用中的关键参数，因此在此我们考虑基于VCII的SiPM接口电路的噪声规范和优化。介绍了VCII的噪声模型，并推导了基于VCII的接口电路的等效噪声。讨论了优化包括功耗，增益和噪声性能在内的关键参数之间的折衷方法。仿真结果还显示，与以前的工作相比，在保留其他性能参数的同时，大多数噪声性能都大大降低了两个数量级。