当前位置: X-MOL 学术Electron. Commun. Jpn. › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
A design of EEGNet‐based inference processor for pattern recognition of EEG using FPGA
Electronics and Communications in Japan ( IF 0.3 ) Pub Date : 2020-11-20 , DOI: 10.1002/ecj.12280
Akihiko Tsukahara 1 , Yuki Anzai 2 , Keita Tanaka 2 , Yoshinori Uchikawa 2
Affiliation  

In recent years, brain‐machine interface (BMI) is attracting attention. BMI is a technology that enables machine operation using biological signals such as EEG. For further advancement of BMI technology, there is a need for advanced BMI devices. Therefore, the purpose of this study is development of BMI hardware specialized for handling EEG as an interface for human adaptive mechatronics (HAM) that know human's state and operate according to the state. As one of the examinations, we are constructing a pattern recognition processor for EEG in real time on Field Programmable Gate Array (FPGA), which is an LSI that can reconfigure the processor. This paper reports on the designed EEGNet processor and the result of logic circuit simulation and implementation.

中文翻译:

基于EEGNet的推理处理器的设计,用于使用FPGA识别脑电图

近年来,脑机接口(BMI)引起了人们的关注。BMI是一项使生物信号(例如EEG)通过机器运行的技术。为了进一步提高BMI技术,需要先进的BMI设备。因此,本研究的目的是开发BMI硬件,该硬件专门用于处理EEG,作为人类自适应机电一体化(HAM)的接口,从而了解人类的状态并根据状态进行操作。作为检查之一,我们正在现场可编程门阵列(FPGA)上实时构建用于EEG的模式识别处理器,FPGA是可以重新配置处理器的LSI。本文报告了设计的EEGNet处理器以及逻辑电路仿真和实现的结果。
更新日期:2020-11-20
down
wechat
bug