The thermal-oxidation/wet-etching gate-recess mask using low-pressure-chemical-vapor-deposition (LPCVD) SiN/atomic-layer-deposition (ALD) AlN combined with high-quality LPCVD-SiN/ALD-SiO₂ gate dielectric has been developed for the fabrication of normally-off GaN MISFETs by the self-terminated gate recess etching technique. The experimental results showed that the SiN/AlN layer could effectively hinder the formation of surface oxide on GaN cap, and ALD grown SiO₂ could effectively protect the GaN channel from high-temperature damages by the following LPCVD. As a result, the fabricated devices exhibit a small on-resistance degradation, 200 mV hysteresis @ V_th=2.4V, <1 nA/mm gate leakage current and 6x10⁸ on/off ratio.

结合低压化学气相沉积（LPCVD）SiN /原子层沉积（ALD）AlN和高质量LPCVD-SiN / ALD-SiO ₂栅极的热氧化/湿蚀刻栅凹掩模通过自端接栅极凹槽蚀刻技术，已开发出电介质用于制造常关型GaN MISFET。实验结果表明，SiN / AlN层可以有效地阻止在GaN盖上形成表面氧化物，而ALD生长的SiO ₂可以有效保护GaN沟道免受以下LPCVD的高温损害。结果，所制造的器件表现出较小的导通电阻降低，V _th = 2.4V时200 mV磁滞，<1 nA / mm的栅极泄漏电流和6x10 ^8的开/关比。