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Design of energy-efficient ternary circuits using differential cascode voltage switch strategies in carbon nanotube field effect transistor technology
IET Circuits, Devices & Systems ( IF 1.3 ) Pub Date : 2020-11-03 , DOI: 10.1049/iet-cds.2019.0375
Trapti Sharma 1 , Laxmi Kumre 1
Affiliation  

Differential cascode voltage switch (DCVS) is a static technique which offers the advantages of layout density, logic flexibility together with improved delay and power consumption. In this study, DCVS-based ternary logic gates and unary operators are reported using static diode voltage divider topology. The main focus of the proposed ternary designs using DCVS logic style is to provide minimum energy consumption with less area overhead. In the presented method, a new power efficient and compact solution is being provided to improve the driving capability of the ternary DCVS circuits. All the simulations are performed on HSPICE synopsis simulator using 32 nm technology under different operational conditions. For the inversion and logical operations, the proposed method has a maximum power reduction of 45% and an energy reduction of 30% as compared to earlier reported DCVS designs. In the case of shifting operators, the maximum power reduction of 38.93% and an energy reduction of 39% are achieved. The design performance is robust when subjected to various process variation effects and have sufficient noise margins.

中文翻译:

碳纳米管场效应晶体管技术中采用差分共源共栅电压开关策略的节能三元电路设计

差分共源共栅电压开关(DCVS)是一项静态技术,具有布局密度,逻辑灵活性以及改进的延迟和功耗等优点。在这项研究中,使用静态二极管分压器拓扑结构报告了基于DCVS的三进制逻辑门和一元运算符。提出的使用DCVS逻辑样式的三元设计的主要重点是提供最小的能耗和更少的面积开销。在提出的方法中,提供了一种新的省电且紧凑的解决方案,以提高三元DCVS电路的驱动能力。所有仿真都是在HSPICE概要模拟器上使用32 nm技术在不同的操作条件下执行的。对于反转和逻辑运算,与早期报道的DCVS设计相比,该方法的最大功耗降低了45%,能耗降低了30%。对于轮班操作员,可实现最大功率降低38.93%,能耗降低39%。当受到各种工艺变化的影响时,设计性能将非常可靠,并具有足够的噪声容限。
更新日期:2020-11-06
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