In this paper, we design an inversion-based S-box with better hardware implementation than the AES S-box with similar cryptographic properties. The proposed S-box computation involves basically two steps, the field inversion, and the affine transformation. The constructed S-box uses a cost-efficient affine transformation with low area resources and low critical path delay (CPD). The sub-blocks of the S-box, such as field inversion in ${\mathbb{F}}_{2^4}$, are implemented based on the efficient circuits. A large number of gates, in the structure, have been implemented by 2-input NAND and 2-input NOR gates to reduce delay and area. The cryptographic strength of the proposed S-boxes is analyzed by studying the properties of S-box such as Nonlinearity, Differential uniformity (DU), Strict avalanche criterion (SAC), Algebraic degree (AD), Differential approximation probability (DAP), and Linear approximation probability (LAP) in SAGE. Security analysis of the proposed S-box shown that the structure has the security level equal to the AES S-box. Therefore, this structure can be used in the lightweight block ciphers. Also, the implementation results, in 180 nm and 65 nm CMOS technologies, show the proposed S-box is comparable in terms of area, delay, and area$\times$delay than most of the famous S-boxes.

在本文中，我们设计了一种基于反转的S-box，其硬件实现比具有类似密码特性的AES S-box更好。所提出的S-box计算基本上包括两个步骤，即场反转和仿射变换。构造的S盒使用具有成本效益的仿射变换，具有较低的区域资源和较低的关键路径延迟（CPD）。S-box的子块，例如${\mathbb{F}}_{2^4}$，是基于高效电路实现的。在结构上，大量的门已经由2输入与非门和2输入NOR门实现，以减少延迟和面积。通过研究S-box的属性，例如非线性，微分均匀性（DU），严格雪崩准则（SAC），代数度（AD），微分近似概率（DAP）和SAGE中的线性近似概率（LAP）。对提议的S-box的安全性分析表明，该结构的安全级别等于AES S-box。因此，该结构可以用于轻量级分组密码中。同样，在180 nm和65 nm CMOS技术中的实施结果表明，所提议的S-box在面积，延迟和面积方面具有可比性$\times$延迟要比大多数著名的S盒延迟。