The recent advances in machine learning, in general, and Artificial Neural Networks (ANN), in particular, has made smart embedded systems an attractive option for a larger number of application areas. However, the high computational complexity, memory footprints, and energy requirements of machine learning models hinder their deployment on resource-constrained embedded systems. Most state-of-the-art works have considered this problem by proposing various low bit-width data representation schemes, optimized arithmetic operators' implementations, and different complexity reduction techniques such as network pruning. To further elevate the implementation gains offered by these individual techniques, there is a need to cross-examine and combine these techniques' unique features. This paper presents ExPAN(N)D, a framework to analyze and ingather the efficacy of the Posit number representation scheme and the efficiency of fixed-point arithmetic implementations for ANNs. The Posit scheme offers a better dynamic range and higher precision for various applications than IEEE $754$ single-precision floating-point format. However, due to the dynamic nature of the various fields of the Posit scheme, the corresponding arithmetic circuits have higher critical path delay and resource requirements than the single-precision-based arithmetic units. Towards this end, we propose a novel Posit to fixed-point converter for enabling high-performance and energy-efficient hardware implementations for ANNs with minimal drop in the output accuracy. We also propose a modified Posit-based representation to store the trained parameters of a network. Compared to an $8$-bit fixed-point-based inference accelerator, our proposed implementation offers $\approx46\%$ and $\approx18\%$ reductions in the storage requirements of the parameters and energy consumption of the MAC units, respectively.

中文翻译：

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ExPAN(N)D：探索基于 FPGA 的系统中高效人工神经网络设计的可能性

机器学习的最新进展，尤其是人工神经网络 (ANN)，使智能嵌入式系统成为更多应用领域的有吸引力的选择。然而，机器学习模型的高计算复杂性、内存占用和能源需求阻碍了它们在资源受限的嵌入式系统上的部署。大多数最先进的工作都通过提出各种低位宽数据表示方案、优化算术运算符的实现以及不同的复杂度降低技术（例如网络剪枝）来考虑这个问题。为了进一步提升这些单独技术提供的实现收益，需要交叉检查并结合这些技术的独特功能。本文介绍了 ExPAN(N)D，一个框架，用于分析和收集 Posit 数字表示方案的功效以及 ANN 的定点算术实现的效率。与 IEEE $754$ 单精度浮点格式相比，Posit 方案为各种应用提供了更好的动态范围和更高的精度。但是，由于Posit 方案各个领域的动态特性，相应的算术电路比基于单精度的算术单元具有更高的关键路径延迟和资源需求。为此，我们提出了一种新颖的定点转换器，用于实现 ANN 的高性能和高能效硬件实现，同时输出精度的下降最小。我们还提出了一种改进的基于 Posit 的表示来存储网络的训练参数。