We propose 8.2‐GHz band radar RFICs for an 8 × 8 phased‐array frequency‐modulated continuous‐wave receiver developed using 65‐nm CMOS technology. This receiver panel is constructed using a multichip solution comprising fabricated 2 × 2 low‐noise amplifier phase‐shifter (LNA‐PS) chips and a 4ch RX front‐end chip. The LNA‐PS chip has a novel phase‐shifter circuit for low‐voltage operation, novel active single‐to‐differential/differential‐to‐single circuits, and a current‐mode combiner to utilize a small area. The LNA‐PS chip shows a power gain range of 5 dB to 20 dB per channel with gain control and a single‐channel NF of 6.4 dB at maximum gain. The measured result of the chip shows 6‐bit phase states with a 0.35˚ RMS phase error. The input P1 dB of the chip is approximately –27.5 dBm at high gain and is enough to cover the highest input power from the TX‐to‐RX leakage in the radar system. The gain range of the 4ch RX front‐end chip is 9 dB to 30 dB per channel. The LNA‐PS chip consumes 82 mA, and the 4ch RX front‐end chip consumes 97 mA from a 1.2 V supply voltage. The chip sizes of the 2 × 2 LNA‐PS and the 4ch RX front end are 2.39 mm × 1.3 mm and 2.42 mm × 1.62 mm, respectively.

中文翻译：

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针对采用65 nm CMOS技术开发的8×8相控阵FMCW接收机的8.2 GHz波段雷达RFIC

我们为使用65 nm CMOS技术开发的8×8相控阵调频连续波接收器建议使用8.2 GHz频带雷达RFIC。该接收器面板采用多芯片解决方案构造而成，该解决方案包括2×2低噪声放大器移相器（LNA-PS）芯片和4ch RX前端芯片。LNA-PS芯片具有用于低压操作的新颖移相器电路，新颖的有源单对差分/差分对单电路以及电流模式组合器，可利用较小的面积。LNA-PS芯片具有增益控制功能，每个通道的功率增益范围为5 dB至20 dB，最大增益时的单通道NF为6.4 dB。芯片的测量结果显示6位相位状态，具有0.35˚RMS相位误差。芯片的输入P1 dB约为–27。5 dBm高增益，足以覆盖雷达系统中TX至RX泄漏的最高输入功率。每通道4通道RX前端芯片的增益范围是9 dB至30 dB。LNA-PS芯片消耗82 mA电流，而4通道RX前端芯片在1.2 V电源电压下消耗97 mA电流。2×2 LNA-PS和4通道RX前端的芯片尺寸分别为2.39 mm×1.3 mm和2.42 mm×1.62 mm。