With growing heterogeneity and complexity in applications, demand to design an energy-efficient and fast computing system in multi-core architecture has heightened. This paper presents a regression-based dynamic voltage frequency scaling model which studies and utilizes workload characteristics to obtain optimal voltage–frequency (v–f) settings. The proposed framework leverages the workload profile information together with power constraints to compute the best-suited voltage–frequency (v–f) settings to (a) maintain global power budget at chip-level, (b) maximize performance while enforcing power constraints at the per-core level. The presented algorithm works in conjunction with the workload characterizer and senses change in application requirements and apply the knowledge to select the next setting for the core. Our results when compared with two state-of-the-art algorithms MaxBIPS and TPEq achieve the average power reduction of 33% and 25% respectively across 32-core architecture for PARSEC benchmarks.

中文翻译：

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使用机器学习的多核系统的动态工作负载感知 DVFS

随着应用程序的异构性和复杂性不断增加，在多核架构中设计节能且快速的计算系统的需求也越来越高。本文提出了一种基于回归的动态电压频率缩放模型，该模型研究并利用工作负载特性来获得最佳电压频率 (v-f) 设置。提议的框架利用工作负载配置文件信息和功率约束来计算最适合的电压-频率 (v-f) 设置，以 (a) 维持芯片级的全局功率预算，(b) 在执行功率约束的同时最大限度地提高性能每个核心级别。所提出的算法与工作负载表征器一起工作，感知应用需求的变化，并应用知识来选择内核的下一个设置。