Quantum‐dot cellular automata (QCA) is a transistor‐less technology to implement the nanoscale circuit designs. QCA circuits are fast, highly dense and dissipate less energy as compared to widely used complementary metal oxide semiconductor (CMOS) technology. In this paper, a novel structure for digital comparator using QCA nanotechnology is proposed. Digital comparator is a basic and important module in central processing unit which compares two binary numbers. The proposed digital comparator is optimal, single layered with 0.50 clock latency and containing only 26 QCA cells. The proposed digital comparator is compared for the different performance metrics with the existing digital comparators. The calculations for energy dissipation are provided using QCA Designer‐E and QCA Pro tools. The proposed coplanar digital comparator is designed with minimum QCA cells which reduces the total cell area, total covered area and cost. Total cell area, total covered area and cost for the proposed digital comparator are 0.008 μm², 0.023 μm² and 0.006 respectively. Results show that energy dissipation for the proposed design is very less therefore, proposed digital comparator is energy efficient.

中文翻译：

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使用QCA纳米技术和能量估算的数字比较器的优化设计

量子点细胞自动机（QCA）是一种无晶体管技术，用于实现纳米级电路设计。与广泛使用的互补金属氧化物半导体（CMOS）技术相比，QCA电路速度快，密度高且耗散的能量更少。本文提出了一种使用QCA纳米技术的数字比较器的新型结构。数字比较器是中央处理器中比较两个二进制数的基本且重要的模块。提出的数字比较器是最佳的，具有0.50时钟延迟的单层，仅包含26个QCA单元。将拟议的数字比较器与现有数字比较器进行比较，以了解不同的性能指标。使用QCA Designer-E和QCA Pro工具提供了能耗计算。拟议的共面数字比较器设计有最少的QCA单元，从而减少了总单元面积，总覆盖面积和成本。拟议的数字比较器的总电池面积，总覆盖面积和成本为0.008μm²，0.023微米²和0.006分别。结果表明，所提出的设计的能耗非常小，因此，所提出的数字比较器具有较高的能效。