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Practical Dynamic SC-Flip Polar Decoders: Algorithm and Implementation
IEEE Transactions on Signal Processing ( IF 5.4 ) Pub Date : 2020-01-01 , DOI: 10.1109/tsp.2020.3023582
Furkan Ercan , Thibaud Tonnellier , Nghia Doan , Warren J. Gross

SC-Flip (SCF) is a low-complexity polar code decoding algorithm with improved performance, and is an alternative to high-complexity (CRC)-aided SC-List (CA-SCL) decoding. However, the performance improvement of SCF is limited since it can correct up to only one channel error ($\omega =1$). Dynamic SCF (DSCF) algorithm tackles this problem by tackling multiple errors ($\omega \geq 1$), but it requires logarithmic and exponential computations, which make it infeasible for practical applications. In this work, we propose simplifications and approximations to make DSCF practically feasible. First, we reduce the transcendental computations of DSCF decoding to a constant approximation. Then, we show how to incorporate special node decoding techniques into DSCF algorithm, creating the Fast-DSCF decoding. Next, we reduce the search span within the special nodes to further reduce the computational complexity. Following, we describe a hardware architecture for the Fast-DSCF decoder, in which we introduce additional simplifications such as metric normalization and sorter length reduction. All the simplifications and approximations are shown to have minimal impact on the error-correction performance, and the reported Fast-DSCF decoder is the only SCF-based architecture that can correct multiple errors. The Fast-DSCF decoders synthesized using TSMC 65 nm CMOS technology can achieve a 1.25, 1.06 and 0.93 Gbps throughput for $\omega \in \lbrace 1,2,3\rbrace$, respectively. Compared to the state-of-the-art fast CA-SCL decoders with equivalent FER performance, the proposed decoders are up to $5.8\times$ more area-efficient. Finally, observations at energy dissipation indicate that the Fast-DSCF is more energy-efficient than its CA-SCL-based counterparts.

中文翻译:

实用动态 SC-Flip 极性解码器:算法和实现

SC-Flip (SCF) 是一种具有改进性能的低复杂度极性码解码算法,是高复杂度 (CRC) 辅助 SC-List (CA-SCL) 解码的替代方法。然而,SCF 的性能提升是有限的,因为它最多只能纠正一个通道错误($\omega =1$)。动态 SCF (DSCF) 算法通过处理多个错误($\omega \geq 1$),但它需要对数和指数计算,这使得它在实际应用中不可行。在这项工作中,我们提出了简化和近似,以使 DSCF 切实可行。首先,我们将 DSCF 解码的超越计算减少到一个常数近似值。然后,我们展示了如何将特殊的节点解码技术结合到 DSCF 算法中,创建 Fast-DSCF 解码。接下来,我们减少特殊节点内的搜索范围以进一步降低计算复杂度。接下来,我们描述了 Fast-DSCF 解码器的硬件架构,在其中我们引入了额外的简化,例如度量归一化和排序器长度减少。所有的简化和近似都表明对纠错性能的影响最小,并且报道的 Fast-DSCF 解码器是唯一可以纠正多个错误的基于 SCF 的架构。使用 TSMC 65 nm CMOS 技术合成的 Fast-DSCF 解码器可以实现 1.25、1.06 和 0.93 Gbps 的吞吐量,用于$\omega \in \lbrace 1,2,3\rbrace$, 分别。与具有等效 FER 性能的最先进的快速 CA-SCL 解码器相比,所提出的解码器高达$5.8\times$更节省面积。最后,对能量耗散的观察表明,Fast-DSCF 比基于 CA-SCL 的同类产品更节能。
更新日期:2020-01-01
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