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High-Throughput/Low-Energy MTJ-Based True Random Number Generator Using a Multi-voltage/Current Converter
IEEE Transactions on Very Large Scale Integration (VLSI) Systems ( IF 2.8 ) Pub Date : 2020-10-01 , DOI: 10.1109/tvlsi.2020.3005413
Naoya Onizawa , Shogo Mukaida , Akira Tamakoshi , Hitoshi Yamagata , Hiroyuki Fujita , Takahiro Hanyu

This article introduces high-throughput/low-energy true random number generators (TRNGs) based on CMOS and three-terminal magnetic tunnel junction (MTJ) devices. MTJs are fast and probabilistic switching devices, which can be used as random number sources for TRNGs. However, as the switching probability is quite sensitive to the write current given to MTJs, precise closed-loop control is necessary. Thus, a high-complexity current control circuit is required, such as high precision digital-to-analog converters (DACs), occupying large area and causing large energy dissipation. In order to address the issue, we propose a multi-voltage/current ( $V/I$ ) converter capable of multilevel coarse current switching and fine adjusting within each level. The fine adjusting can be done by DACs with fewer bits, resulting in much smaller size and energy dissipation than a conventional single- $V/I$ converter. In addition, a multiple-writing scheme for three-terminal MTJs is proposed for increasing the throughput while maintaining the write power. The proposed TRNGs are designed using TSMC 65-nm CMOS and a three-terminal MTJ model that achieves a throughput of 333 Mb/s, an energy dissipation of 0.66 pJ/bit and an area of $2040~\mu {\rm m^{2}}$ . This result exhibits a $5\times $ throughput, a 93% energy reduction and an 86% area reduction in comparison with a conventional CMOS/MTJ-based TRNG.

中文翻译:

使用多电压/电流转换器的高吞吐量/低能量基于 MTJ 的真随机数发生器

本文介绍了基于 CMOS 和三端磁隧道结 (MTJ) 器件的高通量/低能量真随机数发生器 (TRNG)。MTJ 是快速且概率性的切换设备,可用作 TRNG 的随机数源。然而,由于切换概率对提供给 MTJ 的写入电流非常敏感,因此需要精确的闭环控制。因此,需要高复杂度的电流控制电路,如高精度数模转换器(DAC),占用面积大,耗能大。为了解决这个问题,我们提出了一个多电压/电流( $V/I$ ) 转换器能够在每个级别内进行多级粗电流切换和微调。微调可以由位数较少的 DAC 完成,与传统的单通道相比,其尺寸和能量消耗要小得多。 $V/I$ 转换器。此外,提出了一种用于三端 MTJ 的多次写入方案,以在保持写入功率的同时增加吞吐量。所提出的 TRNG 是使用 TSMC 65-nm CMOS 和三端 MTJ 模型设计的,其吞吐量为 333 Mb/s,能量耗散为 0.66 pJ/bit,面积为 $2040~\mu {\rm m^{2}}$ . 这一结果表明 $5\times $ 与传统的基于 CMOS/MTJ 的 TRNG 相比,吞吐量降低了 93%,面积减少了 86%。
更新日期:2020-10-01
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