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AC‐coupled gate driver with gate current switch under single power supply for normally‐off SiC JFET
IEEJ Transactions on Electrical and Electronic Engineering ( IF 1 ) Pub Date : 2020-09-28 , DOI: 10.1002/tee.23255
Kozo Sakamoto 1, 2 , Natsuki Yokoyama 3 , Hiroshi Hozoji 4
Affiliation  

Theoretically, normally‐off silicon carbide (SiC) junction field‐effect transistors (JFETs) do not require a negative gate voltage supply because they are in an off‐state when the gate–source voltage is 0 V. However, most gate drivers for normally‐off SiC JFETs require not only a positive power supply for turning on the JFET but also a negative power supply for turning it off and maintaining a negative gate–source voltage to suppress a false turn‐on power loss caused by crosstalk during fast switching. Therefore, modifications of gate drivers increase complications and costs. In this study, a normally‐off SiC JFET gate driver, which can be realized using a simple circuit configuration with a single power supply, is proposed. To minimize undesirable crosstalk, the gate‐source voltage of the JFET is driven to a negative value and retained in the state for a long period of time. © 2020 Institute of Electrical Engineers of Japan. Published by Wiley Periodicals LLC.

中文翻译:

单电源下具有栅极电流开关的交流耦合栅极驱动器,用于常关SiC JFET

从理论上讲,常关型碳化硅(SiC)结场效应晶体管(JFET)不需要负栅极电压,因为当栅极-源极电压为0 V时它们处于截止状态。但是,大多数栅极驱动器用于常关型SiC JFET不仅需要用于接通JFET的正电源,还需要用于关断JFET的负电源,并维持负的栅极-源极电压,以抑制快速切换期间因串扰导致的虚假接通功率损耗。 。因此,修改栅极驱动器会增加复杂性和成本。在这项研究中,提出了一种常关型SiC JFET栅极驱动器,该驱动器可以使用具有单个电源的简单电路配置来实现。为了最大程度地减少不良串扰,JFET的栅极-源极电压被驱动为负值,并长时间保持该状态。©2020日本电气工程师学会。由Wiley Periodicals LLC发布。
更新日期:2020-11-13
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