Wireless communication standards such as Long-term Evolution (LTE) are rapidly changing to support the high data-rate of wireless devices. The physical layer baseband processing has strict real-time deadlines, especially in the next-generation applications enabled by the 5G standard. Existing basestation transceivers utilize customized DSP cores or fixed-function hardware accelerators for physical layer baseband processing. However, these approaches incur significant non-recurring engineering costs and are inflexible to newer standards or updates. Software-programmable processors offer more adaptability. However, it is challenging to sustain guaranteed worst-case latency and throughput at reasonably low-power on shared-memory many-core architectures featuring inherently unpredictable design choices, such as caches and Network-on-chip (NoC). We propose SPECTRUM , a predictable, software-defined many-core architecture that exploits the massive parallelism of the LTE/5G baseband processing workload. The focus is on designing scalable lightweight hardware that can be programmed and defined by sophisticated software mechanisms. SPECTRUM employs hundreds of lightweight in-order cores augmented with custom instructions that provide predictable timing, a purely software-scheduled NoC that orchestrates the communication to avoid any contention, and per-core software-controlled scratchpad memory with deterministic access latency. Compared to many-core architecture like Skylake-SP (average power 215 W) that drops 14% packets at high-traffic load, 256-core SPECTRUM by definition has zero packet drop rate at significantly lower average power of 24 W. SPECTRUM consumes 2.11× lower power than C66x DSP cores+accelerator platform in baseband processing. We also enable SPECTRUM to handle dynamic workloads with multiple service categories present in 5G mobile network (Enhanced Mobile Broadband (eMBB), Ultra-reliable and Low-latency Communications (URLLC), and Massive Machine Type Communications (mMTC)), using a run-time scheduling and mapping algorithm. Experimental evaluations show that our algorithm performs task/NoC mapping at run-time on fewer cores compared to the static mapping (that reserves cores exclusively for each service category) while still meeting the differentiated latency and reliability requirements.

中文翻译：

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光谱

诸如长期演进 (LTE) 等无线通信标准正在迅速变化，以支持无线设备的高数据速率。物理层基带处理具有严格的实时期限，特别是在 5G 标准支持的下一代应用中。现有的基站收发器利用定制的 DSP 内核或固定功能硬件加速器进行物理层基带处理。然而，这些方法会产生大量的非经常性工程成本，并且对更新的标准或更新不灵活。软件可编程处理器提供了更多的适应性。然而，在具有固有不可预测的设计选择（例如缓存和片上网络 (NoC)）的共享内存众核架构上以合理的低功耗维持有保证的最坏情况延迟和吞吐量是一项挑战。光谱，一种可预测的、软件定义的多核架构，利用 LTE/5G 基带处理工作负载的大规模并行性。重点是设计可扩展的轻量级硬件，这些硬件可以通过复杂的软件机制进行编程和定义。光谱采用数百个轻量级的有序内核，增加了提供可预测时序的自定义指令，一个纯软件调度的 NoC，可以协调通信以避免任何争用，以及具有确定性访问延迟的每个内核软件控制的暂存器内存。与 Skylake-SP（平均功率 215 W）等多核架构相比，它在高流量负载下丢弃 14% 的数据包，256 核光谱根据定义，在 24 W 的平均功率显着降低时，丢包率为零。光谱在基带处理中，功耗比 C66x DSP 内核+加速器平台低 2.11 倍。我们还启用光谱使用运行时调度和映射算法。实验评估表明，与静态映射（为每个服务类别专门保留核心）相比，我们的算法在运行时在更少的核心上执行任务/NoC 映射，同时仍满足差异化的延迟和可靠性要求。