A flexible framework is obtained for enhancing both the thermal and electrical performance of fin field-effect transistor (FinFET) technology. Investigation of the nanoscale heat conduction within a short-channel field-effect transistor can be regarded as an emerging challenge related to future-generation transistors. In this work, we report the electrothermal transport in a 10 nm silicon-on-insulator (SOI) FinFET based on the dual-phase-lag model and modified drift-diffusion motions. We found that electron mobility decreases along the channel due to carrier confinement under higher electric field. In addition, the surface detection temperature indicates that the self-heating process is localized between the source and drain region. As promising results, high-κ metal-oxide and lower thermal boundary resistance can optimize the nanoscale heat transport in the SOI FinFET device.

中文翻译：

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10 nm SOI FinFET技术节点中纳米电热传输的设计优化

获得了用于增强鳍式场效应晶体管（FinFET）技术的热性能和电气性能的灵活框架。对短沟道场效应晶体管内的纳米级导热的研究可被视为与下一代晶体管相关的新兴挑战。在这项工作中，我们报告了基于双相滞后模型和修正的漂移扩散运动的10 nm绝缘体上硅（SOI）FinFET中的电热传输。我们发现，在较高电场下，由于载流子限制，电子迁移率沿沟道下降。另外，表面检测温度表明自热过程位于源极和漏极区域之间。作为有希望的结果，