The effect of gate-length variation on key transistor metrics for vertical nanowire p-type GaSb metal–oxide–semiconductor field-effect transistors (MOSFETs) are demonstrated using a gate-last process. The new fabrication method enables short gate-lengths ( ${L}_{g} =40$ nm) and allows for selective digital etching of the channel region. Extraction of material properties as well as contact resistance are obtained by systematically varying the gate-length. The fabricated transistors show excellent modulation properties with a maximum ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}} =700$ ( ${V}_{GS} = -0.5$ V) as well as peak transconductance of $50~\mu \text{S}/\mu \text{m}$ with a linear subthreshold swing of 224 mV/dec.

中文翻译：

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Si 上垂直 GaSb 纳米线 p-MOSFET 的栅极长度依赖性

栅极长度变化对垂直纳米线 p 型 GaSb 金属氧化物半导体场效应晶体管 (MOSFET) 的关键晶体管指标的影响使用后栅极工艺证明。新的制造方法可以实现较短的栅极长度（ ${L}_{g} =40$ nm) 并允许对沟道区域进行选择性数字蚀刻。通过系统地改变栅极长度，可以获得材料特性和接触电阻的提取。制造的晶体管显示出优异的调制特性，最大 ${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}} =700$ ( ${V}_{GS} = -0.5$ V) 以及峰值跨导 $50~\mu \text{S}/\mu \text{m}$ 具有 224 mV/dec 的线性亚阈值摆幅。