Abstract

The results of the simulation of a triple majority element during the charge collection from a particle track by transistors and simultaneous input switching are reported. The simulation is made using the 3D TCAD physical models of CMOS transistors according to the bulk 65-nm design rule for tracks with a linear energy transfer of 60 MeV cm²/mg to them by a particle. It is found that the duration of the nonstationary state of the AND and OR gates included in a majority gate during the charge collection and the simultaneous input switching is practically independent of the track formation time for each specific point of the track input into a group of transistors. At the beginning of the charge collection, before the switching signals, the gates switch either before the occurrence of switching signals at the inputs, when the off transistors start collecting the charge, or with an additional delay, when the initially on transistors start collecting the charge. As a result, the switching time of the majority gate ranges from 9 to 600 ps, ​​depending on a track input point and signals at the inputs. For the tracks that occur after the input switching of the gate, a noise pulse which has a duration of the nonstationary state characteristic of a specific track input point is generated at the gate output.

中文翻译：

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从单个粒子的轨迹切换和收集电荷时在多数门中进行瞬态仿真

摘要

报告了晶体管从粒子轨迹收集电荷并同时进行输入切换时三重多数元素的仿真结果。该仿真是使用CMOS晶体管的3D TCAD物理模型根据65 nm的大体积设计规则对线能量转移为60 MeV cm ^2的轨道进行的/ mg通过粒子。已经发现，在电荷收集和同时输入切换期间，多数门中包括的与门和或门的非稳态状态的持续时间实际上与轨道输入到一组一组的每个特定点的轨道形成时间无关。晶体管。在电荷收集开始时，在开关信号之前，栅极在关断晶体管开始收集电荷时在输入端出现开关信号之前进行开关，或者在最初导通的晶体管开始收集电荷时以额外的延迟进行开关。收费。结果，取决于磁道输入点和输入端的信号，多数门的开关时间范围为9到600 ps。对于在门的输入切换之后发生的轨道，