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Noise and Spur Comparison of Delta-Sigma Modulators in Fractional-N PLLs
Journal of Electronic Testing ( IF 0.9 ) Pub Date : 2019-12-01 , DOI: 10.1007/s10836-019-05839-3
Bo Zhou , Yao Li , Fuyuan Zhao

A fractional-N phase-locked loop (PLL) with four kinds of delta-sigma modulators (DSMs), is implemented to analyze and compare PLL phase noise and fractional spur performances among different DSMs, including 4th- and 5th-order single-loop (SL) and 3rd- and 4th-order multi-stage noise-shaping (MASH) ones. SL-DSMs with fewer output levels resulting in smaller instantaneous phase error, achieve better phase noise. MASH DSMs with wider quantization levels having more efficient randomization and dithering effects, generate less fractional spur. Experimental results show that in-band and out-of-band fractional spurs of MASH DSM are 10.5 and 5.8dB better than those of SL-DSM, respectively, while out-of-band phase noise of SL-DSM is 4.5dB lower than that of MASH DSM, with the same order. The fractional-N PLL is fabricated in 180nm CMOS with a 1.8V supply voltage and power consumption of approximately 23mW.

中文翻译:

N 分频 PLL 中 Delta-Sigma 调制器的噪声和杂散比较

实现了具有四种 delta-sigma 调制器 (DSM) 的分数 N 锁相环 (PLL),以分析和比较不同 DSM(包括 4 阶和 5 阶单环)之间的 PLL 相位噪声和分数杂散性能(SL) 和 3 阶和 4 阶多级噪声整形 (MASH) 的。具有较少输出电平的 SL-DSM 会导致较小的瞬时相位误差,从而实现更好的相位噪声。具有更宽量化级别的 MASH DSM 具有更有效的随机化和抖动效果,产生的分数杂散更少。实验结果表明,MASH DSM的带内和带外分数杂散分别比SL-DSM好10.5和5.8dB,而SL-DSM的带外相位噪声比SL-DSM低4.5dB。 MASH DSM,顺序相同。分数 N PLL 在 180nm CMOS 中制造,具有 1.
更新日期:2019-12-01
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