For the purpose of evaluating the impact of excitation on double data rate (DDR) interface system transmission performance, a methodology for generating the worst-case excitation is proposed for signal integrity (SI) and power integrity (PI) co-simulation. The excitation is produced with the pseudo random bit sequence (PRBS) gated by a square wave of the resonant frequency of the system power distribution network (PDN). The PRBS can reflect non-ideal factors as crosstalk, reflection and loss in the signal line, and the resonant frequency of the PDN can guarantee the maximum simultaneous switching noise (SSN). A data transmission performance simulation environment of currently widely used low power double data rate SDRAM4 (LPDDR4) is constructed based on the advanced I/O buffer information specification Plus (IBIS Plus) model. Compared with the ordinary PRBS excitation, in terms of eye diagrams, the proposed worst-case excitation reduces the eye width and eye height by 4.7% and 19.9%, respectively. Further analysis also proved that 1/2 duty ratio of the gating wave can maximize the influence from the power noise. In conclusion, the proposed worst-case excitation and test environment provide an improved SI/PI co-simulation scenario for the examination of the robustness of DDR system data transmission performance.

中文翻译：

---

最坏情况激励对 DDR 接口信号和电源完整性联合仿真的影响

为了评估激励对双倍数据速率 (DDR) 接口系统传输性能的影响，提出了一种生成最坏情况激励的方法，用于信号完整性 (SI) 和电源完整性 (PI) 联合仿真。激励由伪随机位序列 (PRBS) 产生，该序列由系统配电网络 (PDN) 的谐振频率的方波选通。PRBS可以反映信号线中的串扰、反射和损耗等非理想因素，PDN的谐振频率可以保证最大同时开关噪声（SSN）。基于高级I/O缓冲区信息规范Plus（IBIS Plus）模型构建了目前广泛使用的低功耗双倍数据速率SDRAM4（LPDDR4）的数据传输性能仿真环境。与普通 PRBS 激励相比，就眼图而言，所提出的最坏情况激励分别使眼宽和眼高减少了 4.7% 和 19.9%。进一步的分析还证明，1/2 的选通波占空比可以最大限度地提高电源噪声的影响。总之，所提出的最坏情况激励和测试环境为检查 DDR 系统数据传输性能的稳健性提供了改进的 SI/PI 协同仿真方案。