Both turbo Hadamard codes and concatenated zigzag Hadamard codes are ultimate-Shannon-limit-approaching channel codes. The former one requires the use of Bahl-Cocke-Jelinek-Raviv (BCJR) in the iterative decoding process, making the decoder structure more complex and limiting its throughput. The latter one, however, does not involve BCJR decoding. Hence its decoder structure can be much simpler and can potentially operate at a much higher throughput. In this paper, we investigate the hardware design of a concatenated zigzag Hadamard encoder/decoder system and implement it onto an FPGA board. We design a decoder capable of decoding multiple codewords at the same time, and the proposed system can operate with a throughput of 1.44 Gbps — an increase of 50% compared with the turbo Hadamard encoder/decoder system. As for the error performance, the encoder/decoder system with a 6-bit quantization achieves a bit error rate of $2\times 10^{-5}$ at $E_{b}/N_{0} = -0.2$ dB.

中文翻译：

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高吞吐量级联Z字形Hadamard编码器/解码器系统的硬件设计

turbo Hadamard 码和连接的锯齿形Hadamard 码都是终极香农极限逼近信道码。前者需要在迭代解码过程中使用 Bahl-Cocke-Jelinek-Raviv (BCJR)，使得解码器结构更加复杂，限制了其吞吐量。然而，后一个不涉及 BCJR 解码。因此，它的解码器结构可以简单得多，并且可以潜在地以更高的吞吐量运行。在本文中，我们研究了串联锯齿形哈达玛编码器/解码器系统的硬件设计，并将其实现到 FPGA 板上。我们设计了一个能够同时解码多个码字的解码器，并且所提出的系统可以以 1.44 Gbps 的吞吐量运行——与 Turbo Hadamard 编码器/解码器系统相比增加了 50%。至于错误表现， $2\times 10^{-5}$ 在 $E_{b}/N_{0} = -0.2$ D b。