Abstract

The Multi-Bulk Synchronous Parallel (Multi-BSP) model is a recently proposed parallel programming model for multicore machines that extends the classic Bulk Synchronous Parallel model. Multi-BSP aims to be a useful model to design algorithms and estimate their running time. This model heavily relies on the right computation of parameters that characterize the hardware. Of course, the hardware utilization also depends on the specific features of the problems and the algorithms applied to solve them. This article introduces a semi-automatic approach for solving problems applying parallel algorithms using the Multi-BSP model. First, the specific multicore computer to use is characterized by applying an automatic procedure. After that, the hardware architecture discovered in the previous step is considered in order to design a portable parallel algorithm. Finally, a fine tuning of parameters is performed to improve the overall efficiency. We propose a specific benchmark for measuring the parameters that characterize the communication and synchronization costs in a particular hardware. Our approach discovers the hierarchical structure of the multicore architecture and compute both parameters for each level that can share data and make synchronizations between computing units. A second contribution of our research is a proposal for a Multi-BSP engine. It allows designing algorithms by applying a recursive methodology over the hierarchical tree already built by the benchmark, focusing on three atomic functions based in a divide-and-conquer strategy. The validation of the proposed method is reported, by studying an algorithm implemented in a prototype of the Multi-BSP engine, testing different parameter configurations that best fit to each problem and using three different high-performance multicore computers.

中文翻译：

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使用Multi-BSP模型的并行解决问题的半自动方法

摘要

多批量同步并行（Multi-BSP）模型是最近提出的用于多核计算机的并行编程模型，它扩展了经典的批量同步并行模型。Multi-BSP旨在成为设计算法和估算算法运行时间的有用模型。该模型严重依赖正确表征硬件的参数的计算。当然，硬件的利用率还取决于问题的具体特征以及用于解决这些问题的算法。本文介绍一种使用Multi-BSP模型通过并行算法解决问题的半自动方法。首先，要使用的特定多核计算机的特征在于应用自动过程。之后，为了设计可移植的并行算法，需要考虑上一步中发现的硬件体系结构。最后，执行参数的微调以提高整体效率。我们提出了一个特定的基准，用于测量表征特定硬件中的通信和同步成本的参数。我们的方法发现了多核体系结构的层次结构，并为可以共享数据并在计算单元之间进行同步的每个级别计算了两个参数。我们研究的第二个贡献是对Multi-BSP引擎的建议。它允许通过在基准测试已经建立的层次树上应用递归方法来设计算法，重点放在基于分而治之策略的三个原子函数上。